參數資料
型號: XR88C192IV
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
中文描述: 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQFP44
封裝: TQFP-44
文件頁數: 5/32頁
文件大?。?/td> 186K
代理商: XR88C192IV
XR88C92/192
5
Rev. 1.31
SYMBOL DESCRIPTION
(* 44 pin TQFP)
OP5
16
14
9
O
Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Confiuration Register bit 5;
-
RxBRDY
- Receive ready signal (Open drain output)
-RxBFULL
- Receive FIFO full signal (Open drain output)
OP6
29
26
24
O
Multi-purpose output. General purpose output or Transmit A
holding register empty interrupt (
-TxARDY
Open drain out-
put).
OP7
17
15
10
O
Multi-purpose output. General purpose output or Transmit B
holding register empty interrupt (
-TxBRDY
Open drain output)
A0-A3
2,4,
6,7
1,3,
5,6
40,42,
44,1
I
Address select lines. To select internal registers.
XTAL1
36
32
30
I
Crystal input 1 or external clock input. A crystal can be
connected between this pin and XTAL2 pin to utilize the
internal oscillator circuit. An external clock can be used to
clock internal circuit and baud rate generator for custom
transmission rates.
XTAL2
37
33
31
O
Crystal input 2 or buffered clock output. See XTAL1.
GND
22
20
16,17
Pwr
Signal and power ground.
-INT
24
21
18
O
Interrupt output (open drain, active low) This pin goes low
upon occurrence of one or more of eight maskable interrupt
conditions (when enabled by the interrupt mask register).
CPU can read the interrupt status register to determine the
interrupting condition(s). This output requires a pull-up resis-
tor.
IP0
8
7
2
I
Multi-purpose input or Channel A Clear-To-Send (-CTSA
active low).
IP1
5
4
43
I
Multi-purpose input or Channel B Clear-To-Send (-CTSB
active low).
IP2
40
36
34
I
Multi-purpose input or Timer/Counter External clock input.
Symbol
Pin
40
Signal
type
Pin Description
44
44*
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