參數(shù)資料
型號: XR88C192IV
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
中文描述: 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQFP44
封裝: TQFP-44
文件頁數(shù): 15/32頁
文件大?。?/td> 186K
代理商: XR88C192IV
XR88C92/192
15
Rev. 1.31
A3 A2 A1 A0
Register
[Default]
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3
BIT-2
BIT-1
BIT-0
0
1
0
0
0
0
0
0
MRA0[00]
MRB0[00]
Watch
dog timer
RX
TX
TX
Not
used
Baud
rate
ext. 2
Factory
test
mode
Baud
rate
ext. 1
trigger
level [1]
trigger
level [1]
trigger
level [0]
0
1
0
0
0
0
0
0
MRA1[00]
MRB1[00]
RX
RTS
control
RX
Error
mode
Parity
mode
Parity
mode
Parity
type
Word
length
Word
length
trigger
level [0]
0
1
0
0
0
0
0
0
MRA2[00]
MRB2[00]
Loopback
mode
select
Loopback
mode
select
TX
RTS
control
Auto
CTS
control
Stop
bit
length
Stop
bit
length
Stop
bit
length
Stop
bit
length
0
1
0
0
0
0
1
1
SRA[00]
SRB[00]
Received
break
Framing
error
Parity
error
Overrun
error
Tx
Tx
Rx FIFO
full
Rx
ready
empty
ready
0
1
0
0
0
0
1
1
CSRA[00]
CSRB[00]
RX
clock
RX
clock
RX
clock
RX
clock
TX
TX
TX
TX
clock
clock
clock
clock
0
1
0
0
1
1
0
0
CRA[00]
CRB[00]
Misc.
command
Misc.
command
Misc.
command
Misc.
command
TX
TX
RX
RX
disable
enable
disable
enable
0
1
0
0
1
1
1
1
RXA[XX]
RXB[XX]
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
0
1
0
0
0
1
1
1
0
1
1
0
TXA[XX]
TXB[XX]
IPCR[00]
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
Delta
IP3
Delta
IP2
Delta
IP1
Delta
IP0
IP3
input
IP2
input
IP1
input
IP0
input
0
1
0
0
ACR[00]
Baud
rate set
select
C/T
mode
C/T
mode
C/T
mode
Delta
IP3
int.
Delta
IP2
int.
Delta
IP1
int.
Delta
IP0
int.
0
1
0
1
ISR[00]
Input
port
change
Delta
break B
RxB
ready
TxB
ready
C/T
ready
Delta
break A
RxA
ready
TxA
ready
0
1
0
1
IMR[00]
Input
port
change
Delta
break B
RxB
ready
TxB
ready
C/T
ready
Delta
break A
RxA
ready
TxA
ready
0
1
1
0
CTPU[00]
Bit-15
Bit-14
Bit-13
Bit-12
Bit-11
Bit-10
Bit-9
Bit-8
CUR[00]
0
1
1
1
CTPL[00]
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
CLR[00]
1
1
0
0
GPR[00]
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
1
1
0
1
IPR[XX]
Not
Used
IP6
IP5
IP4
IP3
IP2
IP1
IP0
1
1
0
1
OPCR[00]
OP7
OP6
OP5
OP4
OP3
OP3
OP2
OP2
1
1
1
0
STCR[XX]
X
X
X
X
X
X
X
X
1
1
1
0
SOPR[00]
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
1
1
1
1
SPCR[XX]
X
X
X
X
X
X
X
X
1
1
1
1
ROPR[00]
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
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