參數(shù)資料
型號(hào): XR19L210IL40-0A-EB
廠商: Exar Corporation
文件頁數(shù): 9/43頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR19L202 40QFN
標(biāo)準(zhǔn)包裝: 1
系列: *
XR19L210
17
REV. 1.0.2
SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER
2.18
Internal Loopback
The L210 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally
including automatic hardware and software flow control. Figure 11 below shows how the internal UART signals
are re-configured. Transmit data from the transmit shift register output is internally routed to the receive shift
register input allowing the system to receive the same data that it was sending. The TX and RTS# pins are held
HIGH while RX and CTS# inputs are ignored. Caution: the RX input pin must be held at inactive during
loopback test else upon exiting the loopback test the UART may detect and report a false “break” signal.
FIGURE 11. INTERNAL LOOP BACK
TX
RX
Mo
dem
/
General
Purp
ose
Con
trol
L
o
g
ic
In
te
rnal
Dat
a
Bus
L
ine
s
and
Con
trol
Sig
nals
RTS#
MCR bit-4=1
VCC
Transmit Shift Register
(THR/FIFO)
Receive Shift Register
(RHR/FIFO)
CTS#
OP1#
RTS#
CTS#
DTR#
DSR#
RI#
CD#
OP2#
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