- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3762 > XR16V2750IMTR-F (Exar Corporation)IC UART FIFO 64B DUAL 48TQFP PDF資料下載
參數(shù)資料
| 型號： | XR16V2750IMTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 52/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 64B DUAL 48TQFP |
| 標準包裝： | 1,500 |
| 特點： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS232，RS485 |
| 電源電壓： | 2.25 V ~ 3.6 V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP（7x7） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁當(dāng)前第52頁
XR16V2750
9
REV. 1.0.3
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
registers, but do not attempt to read from both uarts simultaneously. Individual channel select functions are
shown in Table 1.
2.6
Channel A and B Internal Registers
Each UART channel in the V2750 has a set of enhanced registers for control, monitoring and data loading and
unloading. The configuration register set is compatible to those already available in the standard single
16C550 and dual ST16C2550. These registers function as data holding registers (THR/RHR), interrupt status
and control registers (ISR/IER), a FIFO control register (FCR), receive line status and control registers (LSR/
LCR), modem status and control registers (MSR/MCR), programmable data rate (clock) divisor registers (DLL/
DLM/DLD), and a user accessible Scratchpad Register (SPR).
Beyond the general 16C2550 features and capabilities, the V2750 offers enhanced feature registers (EMSR,
FLVL, EFR, Xon/Xoff 1, Xon/Xoff 2, FCTR, TRG, FC) that provide automatic RTS and CTS hardware flow
control, Xon/Xoff software flow control, automatic RS-485 half-duplex direction output enable/disable, FIFO
trigger level control, and FIFO level counters. All the register functions are discussed in full detail later in
2.7
DMA Mode
The device does not support direct memory access. The DMA Mode (a legacy term) in this document doesn’t
mean “direct memory access” but refers to data block transfer operation. The DMA mode affects the state of
the RXRDY# A/B and TXRDY# A/B output pins. The transmit and receive FIFO trigger levels provide additional
flexibility to the user for block mode operation. The LSR bits 5-6 provide an indication when the transmitter is
empty or has an empty location(s) for more data. The user can optionally operate the transmit and receive
FIFO in the DMA mode (FCR bit-3=1). When the transmit and receive FIFO are enabled and the DMA mode is
disabled (FCR bit-3 = 0), the V2750 is placed in single-character mode for data transmit or receive operation.
When DMA mode is enabled (FCR bit-3 = 1), the user takes advantage of block mode operation by loading or
unloading the FIFO in a block sequence determined by the programmed trigger level. In this mode, the V2750
sets the TXRDY# pin when the transmit FIFO becomes full, and sets the RXRDY# pin when the receive FIFO
TABLE 1: CHANNEL A AND B SELECT
CSA#
CSB#
FUNCTION
1
UART de-selected
0
1
Channel A selected
1
0
Channel B selected
0
Channel A and B selected
TABLE 2: TXRDY# AND RXRDY# OUTPUTS IN FIFO AND DMA MODE
PINS
FCR BIT-0=0
(FIFO DISABLED)
FCR BIT-0=1 (FIFO ENABLED)
FCR Bit-3 = 0
(DMA Mode Disabled)
FCR Bit-3 = 1
(DMA Mode Enabled)
RXRDY# A/B LOW = 1 byte.
HIGH = no data.
LOW = at least 1 byte in FIFO.
HIGH = FIFO empty.
HIGH to LOW transition when FIFO reaches the
trigger level, or time-out occurs.
LOW to HIGH transition when FIFO empties.
TXRDY# A/B LOW = THR empty.
HIGH = byte in THR.
LOW = FIFO empty.
HIGH = at least 1 byte in FIFO.
LOW = FIFO has at least 1 empty location.
HIGH = FIFO is full.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR88C681CJTR-F | IC UART CMOS DUAL 44PLCC |
| ST16C2550IQ48TR-F | IC UART FIFO 16B DUAL 48TQFP |
| XR16C2550IMTR-F | IC UART FIFO 16B DUAL 48TQFP |
| ST78C34CP40-F | IC UART FIFO 83B 40PDIP |
| XR16M2551IL32TR-F | IC UART FIFO 16B DUAL 32QFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16V2751 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE |
| XR16V2751_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE |
| XR16V2751_0709 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE |
| XR16V2751IM | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE |
| XR16V2751IM-0B-EB | 功能描述:UART 接口集成電路 Supports V2751 48 ld TQFP, PCI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。