REV. 1.0.2 HIGH PERFORMANCE DUART WITH 32-BYTE FIFO TABLE 15: UART " />
參數(shù)資料
型號: XR16V2650IL-0B-EB
廠商: Exar Corporation
文件頁數(shù): 29/47頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR V2650 32QFN
標(biāo)準(zhǔn)包裝: 1
系列: *
XR16V2650
35
REV. 1.0.2
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
TABLE 15: UART RESET CONDITIONS FOR CHANNEL A AND B
REGISTERS
RESET STATE
DLM, DLL
DLM = 0x00 and DLL = 0x01. Only resets to these values during a power up.
They do not reset when the Reset Pin is asserted.
DLD
Bits 7-0 = 0x00
RHR
Bits 7-0 = 0xXX
THR
Bits 7-0 = 0xXX
IER
Bits 7-0 = 0x00
FCR
Bits 7-0 = 0x00
ISR
Bits 7-0 = 0x01
LCR
Bits 7-0 = 0x00
MCR
Bits 7-0 = 0x00
LSR
Bits 7-0 = 0x60
MSR
Bits 3-0 = Logic 0
Bits 7-4 = Logic levels of the inputs inverted
SPR
Bits 7-0 = 0xFF
EFR
Bits 7-0 = 0x00
XON1
Bits 7-0 = 0x00
XON2
Bits 7-0 = 0x00
XOFF1
Bits 7-0 = 0x00
XOFF2
Bits 7-0 = 0x00
I/O SIGNALS
RESET STATE
TX
HIGH
OP2#
HIGH
RTS#
HIGH
DTR#
HIGH
RXRDY#
HIGH
TXRDY#
LOW
INT
Three-State Condition
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