XR16L2750
xr
2.25V TO 5.5V DUART WITH 64-BYTE FIFO
REV. 1.2.1
38
AC ELECTRICAL CHARACTERISTICS
UNLESS OTHERWISE NOTED: TA=0O TO 70OC (-40O TO +85OC FOR INDUSTRIAL GRADE PACKAGE), VCC=2.25 - 5.5V,
70 PF LOAD WHERE APPLICABLE
SYMBOL
PARAMETER
LIMITS
2.5
MIN
MAX
LIMITS
3.3
MIN
MAX
LIMITS
5.0
MIN
MAX
UNIT
-
Crystal Frequency
16
20
24
MHz
CLK
External Clock Low/High Time
20
15
10
ns
OSC
External Clock Frequency
24
33
50
MHz
TAS
Address Setup Time
10
ns
TAH
Address Hold Time
10
ns
TCS
Chip Select Width
150
75
50
ns
TRD
IOR# Strobe Width
150
75
50
ns
TDY
Read Cycle Delay
150
75
50
ns
TRDV
Data Access Time
135
70
45
ns
TDD
Data Disable Time
0
45
0
30
0
30
ns
TWR
IOW# Strobe Width
150
75
50
ns
TDY
Write Cycle Delay
150
75
50
ns
TDS
Data Setup Time
25
20
15
ns
TDH
Data Hold Time
15
10
ns
TWDO
Delay From IOW# To Output
150
75
50
ns
TMOD
Delay To Set Interrupt From MODEM Input
150
75
50
ns
TRSI
Delay To Reset Interrupt From IOR#
150
75
50
ns
TSSI
Delay From Stop To Set Interrupt
1
Bclk
TRRI
Delay From IOR# To Reset Interrupt
150
75
50
ns
TSI
Delay From Stop To Interrupt
150
75
50
ns
TINT
Delay From Initial INT Reset To Transmit
Start
8
24
8
24
8
24
Bclk
TWRI
Delay From IOW# To Reset Interrupt
150
75
50
ns
TSSR
Delay From Stop To Set RXRDY#
1
Bclk
TRR
Delay From IOR# To Reset RXRDY#
150
75
50
ns
TWT
Delay From IOW# To Set TXRDY#
150
75
50
ns
TSRT
Delay From Center of Start To Reset TXRDY#
8
Bclk