參數(shù)資料
型號(hào)： XR16L2552IJTR-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 41/45頁(yè)
文件大?。?/td> 0K
描述： IC UART FIFO 16B DUAL 44PLCC
標(biāo)準(zhǔn)包裝： 500
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 16 字節(jié)
規(guī)程： RS232
電源電壓： 2.25 V ~ 5.5 V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 44-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 44-PLCC（16.59x16.59）
包裝： 帶卷 (TR)
XR16L2552
5
REV. 1.1.2
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
RIB#
27
31
I
UART channel B Ring-Indicator (active low) or general purpose input. This
input should be connected to VCC when not used. This input has no effect on
the UART.
MFA#
32
35
O
Multi-Function Output Channel A. This output pin can function as the OP2A#,
BAUDOUTA#, or RXRDYA# pin. One of these output signal functions can be
selected by the user programmable bits 1-2 of the Alternate Function Register
(AFR). These signal functions are described as follows:
1) OP2A# - When OP2A# (active low) is selected, the MF# pin is a logic 0
when MCR bit-3 is set to a logic 1 (see MCR bit-3). MCR bit-3 defaults to a
logic 1 condition after a reset or power-up.
2) BAUDOUTA# - When BAUDOUTA# function is selected, the 16X Baud rate
clock output is available at this pin.
3) RXRDYA# - RXRDYA# (active low) is intended for monitoring DMA data
transfers. If using the 48-TQFP package, this output is already available at pin
31.
If it is not used, leave it unconnected.
MFB#
14
19
O
Multi-Function Output ChannelB. This output pin can function as the OP2B#,
BAUDOUTB#, or RXRDYB# pin. One of these output signal functions can be
selected by the user programmable bits 1-2 of the Alternate Function Register
(AFR). These signal functions are described as follows:
1) OP2B# - When OP2B# (active low) is selected, the MF# pin is a logic 0
when MCR bit-3 is set to a logic 1 (see MCR bit-3). MCR bit-3 defaults to a
logic 1 condition after a reset or power-up.
2) BAUDOUTB# - When BAUDOUTB# function is selected, the 16X Baud rate
clock output is available at this pin.
3) RXRDYB# - RXRDYB# (active low) is intended for monitoring DMA data
transfers. If using the 48-TQFP package, this output is already available at pin
8.
If it is not used, leave it unconnected.
ANCILLARY SIGNALS
XTAL1
5
11
I
Crystal or external clock input.
XTAL2
7
13
O
Crystal or buffered clock output.
RESET
16
21
I
Reset (active high) - A longer than 40 ns logic 1 pulse on this pin will reset the
internal registers and all outputs. The UART transmitter output will be held at
logic 1, the receiver input will be ignored and outputs are reset during reset
period (see External Reset Conditions).
VCC
29, 42
44, 33
Pwr
2.25V to 5.5V power supply. All input pins are 5V tolerant.
GND
6, 17
22, 12
Pwr
Power supply common, ground.
Pin Description
NAME
48-TQFP
PIN#
44-PLCC
PIN #
TYPE
DESCRIPTION
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