參數(shù)資料
型號: XR16C850CP
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control
中文描述: 1 CHANNEL(S), 2.25M bps, SERIAL COMM CONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 11/55頁
文件大?。?/td> 331K
代理商: XR16C850CP
XR16C850
11
Rev. 1.20
Symbol
Pin
Signal
type
Pin Description
40
44
48
52
SYMBOL DESCRIPTION
reading MSR bit-4. This pin only affects the transmit
and receive operations when Auto CTS function is
enabled via the Enhanced Feature Register (EFR)
bit-7, for hardware flow control operation.
-DSR
37
41
39
42
I
Data Set Ready (active low) - A logic 0 on this pin
indicates the modem or data set is powered-on and
is ready for data exchange with the UART. This pin
has no effect on the UART’s transmit or receive
operation.
-DTR
33
37
33
36
O
Data Terminal Ready (active low) - A logic 0 on this
pin indicates that the 850 is powered-on and ready.
This pin can be controlled via the modem control
register. Writing a logic 1 to MCR bit-0 will set the -
DTR output to logic 0, enabling the modem. This pin
will be a logic 1 after writing a logic 0 to MCR bit-0,
or after a reset. This pin has no effect on the UART’s
transmit or receive operation.
-RI
39
43
41
44
I
Ring Indicator (active low) - A logic 0 on this pin
indicates the modem has received a ringing signal
from the telephone line. A logic 1 transition on this
input pin will generate an interrupt.
-RTS
32
36
32
35
O
Request to Send (active low) - A logic 0 on the -RTS
pin indicates the transmitter has data ready and
waiting to send. Writing a logic 1 in the modem
control register (MCR bit-1) will set this pin to a logic
0 indicating data is available. After a reset this pin
will be set to a logic 1. This pin only affects the
transmit and receive operations when Auto RTS
function is enabled via the Enhanced Feature Reg-
ister (EFR) bit-6, for hardware flow control operation.
RX / IRRX
10
11
7
7
I
Receive Data - This pin provides the serial receive
data input to the 850. Two user selectable interface
options are available. The first option supports the
standard serial interface. The second option pro-
vides an Infrared decoder nterface, see figures 2 and
3. When using the standard modem interface, the
RX input must be a logic 1 during idle (no data
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