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參數(shù)資料
| 型號： | XR16C850CJ |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control |
| 中文描述： | 1 CHANNEL(S), 2.25M bps, SERIAL COMM CONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 17/55頁 |
| 文件大?。?/td> | 331K |
| 代理商： | XR16C850CJ |
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XR16C850
17
Rev. 1.20
Internal Registers
The 850 provides 15 internal registers for monitoring and
control. These registers are shown in Table 3 below.
Twelve registers are similar to those already available in
the standard 16C550. These registers function as data
holding registers (THR/RHR), interrupt status and con-
trol registers (IER/ISR), a FIFO control register (FCR),
line status and control registers, (LCR/LSR), modem
status and control registers (MCR/MSR), program-
mable data rate (clock) control registers (DLL/DLM),
and a user assessable scratchpad register (SPR).
Beyond the general 16C550 features and capabilities,
the 850 offers an enhanced feature register set called
EFR, Xon/Xoff 1-2, TRG, FCTR, and EMSR. Register
functions are more fully described in the following
paragraphs.
A2
A1
A0
READ MODE
WRITE MODE
General Register Set (THR/RHR, IER/ISR, MCR/MSR, LCR/LSR, SPR):
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Receive Holding Register
Transmit Holding Register
Interrupt Enable Register
FIFO Control Register
Line Control Register
Modem Control Register
Interrupt Status Register
Line Status Register
Modem Status Register
Scratchpad Register
Scratchpad Register
Baud Rate Register Set (DLL/DLM): Note *3
0
0
0
0
0
1
LSB of Divisor Latch
MSB of Divisor Latch
LSB of Divisor Latch
MSB of Divisor Latch
Enhanced Register Set (Xon/off 1-2, TRG, FCTR, EFR, EMSR): Note *4
0
0
0
1
1
1
1
1
0
0
1
0
0
1
1
1
0
1
0
0
1
0
1
1
FIFO Trigger Register
FIFO trigger counter
Feature Control Register
Enhanced Feature Register
Xon-1 Word
Xon-2 Word
Xoff-1 Word
Xoff-2 Word
Enhanced Mode Select Register
Enhanced Feature Register
Xon-1 Word
Xon-2 Word
Xoff-1 Word
Xoff-2 Word
Table 3. INTERNAL REGISTERS
Note *3: These registers are accessible only when LCR bit-7 is set to a logic 1.
Note *4: Enhanced Feature Registers are accessible only when the LCR is set to “BF” hex.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16C850CJ-F | 功能描述:UART 接口集成電路 UARTW/128BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C850CJTR-F | 制造商:Exar Corporation 功能描述:UART 1-CH 128Byte FIFO 3.3V/5V 44-Pin PLCC T/R 制造商:Exar Corporation 功能描述:XR16C850CJTR-F |
| XR16C850CM | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| XR16C850CM-0A-EVB | 功能描述:UART 接口集成電路 Supports C850 48 ld TQFP, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C850CM-F | 功能描述:UART 接口集成電路 UARTW/128BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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