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參數(shù)資料
| 型號(hào)： | XR-T7295IP |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DS3/Sonet STS-1 Integrated Line Receiver |
| 中文描述： | RECEIVER, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-20 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 226K |
| 代理商： | XR-T7295IP |
XR-T7295
11
Rev. 1.05
JITTER ACCOMMODATION
Under all allowable operating conditions, the jitter
accommodation of the XR-T7295 device exceeds all
system
requirements
for
(BER<1E
-9
). The typical (V
DD
= 5V, T = 25
°
C, DSX-3
nominal signal level) jitter accommodation for the
XR-T7295 is shown in Figure 10.
error-free
operation
FALSE-LOCK IMMUNITY
False-lock is defined as the condition where a PLL
recovered clock obtains stable phase-lock at a frequency
not equal to the incoming data rate. The XR-T7295
device uses a combination frequency/phase-lock
architecture to prevent false-lock. An on-chip frequency
comparator continuously compares the EXCLK reference
to the PLL clock. If the frequency difference between the
EXCLK and PLL clock exceeds approximately
correction circuitry forces re-acquisition of the proper
frequency and phase.
0.5%,
ACQUISITION TIME
If a valid input signal is assumed to be already present at
R
IN
, the maximum time between the application of device
power and error-free operation is 20ms. If power has
already been applied, the interval between the application
of valid data (or the action of valid data following a loss of
signal) and error-free operation is 4ms.
LOSS-OF-LOCK DETECTION
As stated above, the PLL acquisition aid circuitry monitors
the PLL clock frequency relative to the EXCLK frequency.
The RLOL alarm is activated if the difference between the
PLL clock and the EXCLK frequency exceeds
approximately
0.5%.
This will not occur until at least 250 bit periods after loss of
input data.
Figure 9. Typical PLL Jitter Transfer
Characteristic
Frequency (Hz)
1
0
-5
-4
-3
-2
-1
f3dB = 205kHz
M
40
10
1.0
0.1
Category 1
60k 1
XR-T7295 Typical
Sinewave Jitter Frequency (Hz)
Figure 10. Input Jitter Tolerance at DSX-3 Level
Jitter
(Hz)
Jitter
(U.I.)
P
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR-T7295 | DS3/Sonet STS-1 Integrated Line Receiver |
| XR-T7295IW | DS3/Sonet STS-1 Integrated Line Receiver |
| XR-T7296 | DS3/STS-1, E3 Integrated Line Transmitter |
| XR-T7296IP | DS3/STS-1, E3 Integrated Line Transmitter |
| XR-T7296IW | DS3/STS-1, E3 Integrated Line Transmitter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR-T7295IW | 制造商:EXAR 制造商全稱:EXAR 功能描述:DS3/Sonet STS-1 Integrated Line Receiver |
| XR-T7295SIP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET Receiver |
| XR-T7295SIW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET Receiver |
| XR-T7295TIP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Receiver |
| XR-T7295TIW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Receiver |
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