參數(shù)資料
型號(hào): XPC8255ZUIFBC
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 33/41頁(yè)
文件大?。?/td> 0K
描述: IC MPU POWERQUICC II 480-TBGA
標(biāo)準(zhǔn)包裝: 21
系列: MPC82xx
處理器類型: 32-位 MPC82xx PowerQUICC II
速度: 200MHz
電壓: 2.5V
安裝類型: 表面貼裝
封裝/外殼: 480-LBGA
供應(yīng)商設(shè)備封裝: 408-TBGA(37.5x37.5)
包裝: 托盤
MPC8260 PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
39
Ordering Information
6
Ordering Information
Figure 16 provides an example of the Freescale part numbering nomenclature for the MPC8260. In
addition to the processor frequency, the part numbering scheme also consists of a part modifier that
indicates any enhancement(s) in the part from the original production design. Each part number also
contains a revision code that refers to the die mask revision number and is specified in the part numbering
scheme for identification purposes only. For more information, contact your local Freescale sales office.
Figure 16. Freescale Part Number Key
7
Document Revision History
Table 17 lists significant changes in each revision of this document.
Table 17. Document Revision History
Rev.
Number
Date
Substantive Change(s)
2
05/2010
Added a note about rise/fall time on CPM input pins above Table 8, “AC Characteristics for CPM Inputs.
1.3
9/2005
Document template update.
1.2
8/2003
Note: In revision 0.7, sp30 (Table 10) was changed. This change was not previously recorded in this
“Document Revision History” Table.
Addition of MPC8255 description to Section 1, “Features”
Addition of Figure 2
Addition of VCCSYN to “Note: Core, PLL, and I/O Supply Voltages” following Table 2
Addition of note 1 to Table 3
Addition of notes or modifications to Figure 3 through Figure 8
Addition of reference notes 4, 5, and 6 to Table 13
Addition of note 2 to Table 14
Addition of SPICLK to PC19 in Table 14. It is documented correctly in the
MPC8260 PowerQUICC
II Family Reference Manual but had previously been omitted from Table 14.
1.1
5/2002
Section 1, “Features”: updated minimum supported core frequency to 133 MHz
Addition of “Note” at bottom of page 5.
Table 13: Note 3.
Product Code
Device Number
Package
(ZU = 480 TBGA)
Core Voltage
Processor Frequency
Die Revision Level
MPC 82XX C ZU XXX
(CPU/CPM/Bus)
X
(Nn = Major.minor)
XX
Temperature Range
Blank = 0 to 105 °C
C = -40 to 105 °C
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