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| 型號： | XCS10XL-4PC84C |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | FPGA, 196 CLBS, 3000 GATES, 217 MHz, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁數(shù)： | 11/83頁 |
| 文件大小： | 770K |
| 代理商： | XCS10XL-4PC84C |
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Spartan and Spartan-XL FPGA Families Data Sheet
DS060 (v1.8) June 26, 2008
19
Product Specification
R
3-State Long Line Drivers
A pair of 3-state buffers is associated with each CLB in the
array. These 3-state buffers (BUFT) can be used to drive
signals onto the nearest horizontal longlines above and
below the CLB. They can therefore be used to implement
multiplexed or bidirectional buses on the horizontal lon-
glines, saving logic resources.
There is a weak keeper at each end of these two horizontal
longlines. This circuit prevents undefined floating levels.
However, it is overridden by any driver.
The buffer enable is an active High 3-state (i.e., an active
Low enable), as shown in Table 11.
Three-State Buffer Example
Figure 18 shows how to use the 3-state buffers to imple-
ment a multiplexer. The selection is accomplished by the
buffer 3-state signal.
Pay particular attention to the polarity of the T pin when
using these buffers in a design. Active High 3-state (T) is
identical to an active Low output enable, as shown in
Figure 17: Detail of Spartan/XL Dedicated Carry Logic
01
M
0
1
01
M
0
1
M
0
3
M
1
M
I
G1
G4
F2
F1
F3
COUT
COUT0
G2
G3
F4
CIN
DS060_17_080400
TO
FUNCTION
GENERATORS
M
Table 11: Three-State Buffer Functionality
IN
T
OUT
X1
Z
IN
0
IN
Figure 18: 3-state Buffers Implement a Multiplexer
DN
DC
DB
DA
ABC
N
Z = (DA A) + (DB B) + (DC C) + (DN N)
~100 k
Ω
"Weak Keeper"
DS060_18_080400
BUFT
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