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參數(shù)資料
| 型號： | XCR3032XL-7VQ44I |
| 廠商： | XILINX INC |
| 元件分類： | PLD |
| 英文描述： | XCR3032XL 32 Macrocell CPLD |
| 中文描述： | EE PLD, 7.5 ns, PQFP44 |
| 封裝： | VQFP-44 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 84K |
| 代理商： | XCR3032XL-7VQ44I |
R
Internal Timing Parameters
(1,2)
Symbol
Parameter
-5
-7
-10
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Buffer Delays
T
IN
T
FIN
T
GCK
T
OUT
T
EN
Internal Register and Combinatorial Delays
Input buffer delay
-
0.7
-
1.6
-
2.2
ns
Fast Input buffer delay
-
2.2
-
3.0
-
3.1
ns
Global Clock buffer delay
-
0.7
-
1.0
-
1.3
ns
Output buffer delay
-
1.8
-
2.7
-
3.6
ns
Output buffer enable/disable delay
-
4.5
-
5.0
-
5.7
ns
T
LDI
T
SUI
T
HI
T
ECSU
T
ECHO
T
COI
T
AOI
T
RAI
T
LOGI1
T
LOGI2
Feedback Delays
Latch transparent delay
-
1.3
-
1.6
-
2.0
ns
Register setup time
1.0
-
1.0
-
1.2
-
ns
Register hold time
0.3
-
0.5
-
0.7
-
ns
Register clock enable setup time
2.0
-
2.5
-
3.0
-
ns
Register clock enable hold time
3.0
-
4.5
-
5.5
-
ns
Register clock to output delay
-
1.0
-
1.3
-
1.6
ns
Register async. S/R to output delay
-
2.0
-
2.3
-
2.1
ns
Register async. recovery
-
3.5
-
5.0
-
6.0
ns
Internal logic delay (single p-term)
-
2.0
-
2.7
-
3.3
ns
Internal logic delay (PLA OR term)
-
2.5
-
3.2
-
4.2
ns
T
F
Time Adders
ZIA delay
-
0.5
-
2.9
-
3.5
ns
T
LOGI3
T
UDA
T
SLEW
Fold-back NAND delay
-
2.0
-
2.5
-
3.0
ns
Universal delay
-
1.2
-
2.0
-
2.5
ns
Slew rate limited delay
-
4.0
-
5.0
-
6.0
ns
Notes:
1.
2.
These parameters guaranteed by design and characterization, not testing.
See XPLA3 family data sheet (
DS012
) for timing model.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XCR3032XL-7CS48I | XCR3032XL 32 Macrocell CPLD |
| XCR3032XL-7PC44C | XCR3032XL 32 Macrocell CPLD |
| XCR3032XL-7PC44I | XCR3032XL 32 Macrocell CPLD |
| XCR3128XLSERIES | 128 Macrocell CPLD |
| XCR3256XLSERIES | 256 Macrocell CPLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XCR3032XL-7VQG44C | 制造商:Xilinx 功能描述:CPLD COOLRUNNER XPLA3 750 GATES 32 MCRCLLS 166.67MHZ 0.35UM - Trays |
| XCR3032XL-7VQG44I | 制造商:Xilinx 功能描述:CPLD COOLRUNNER XPLA3 750 GATES 32 MCRCLLS 166.67MHZ 0.35UM - Trays |
| XCR3032XLSERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32 Macrocell CPLD |
| XCR3064A | 制造商:XILINX 制造商全稱:XILINX 功能描述:64 Macrocell CPLD With Enhanced Clocking |
| XCR3064A-10CP56C | 制造商:XILINX 制造商全稱:XILINX 功能描述:64 Macrocell CPLD With Enhanced Clocking |
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