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參數(shù)資料
| 型號(hào)： | XC95288-15BG352C |
| 英文描述： | Flash Complex PLD |
| 中文描述： | 閃光復(fù)雜可編程邏輯器件 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 133K |
| 代理商： | XC95288-15BG352C |
R
XC9500 In-System Programmable CPLD Family
10
September 15, 1999 (Version 5.0)
I/O Block
The I/O Block (IOB) interfaces between the internal logic
and the device user I/O pins. Each IOB includes an input
buffer, output driver, output enable selection multiplexer,
and user programmable ground control. See
Figure 10
for
details.
The input buffer is compatible with standard 5 V CMOS, 5 V
TTL and 3.3 V signal levels. The input buffer uses the internal
5 V voltage supply (V
CCINT
) to ensure that the input thresh-
olds are constant and do not vary with the V
CCIO
voltage.
The output enable may be generated from one of four
options: a product term signal from the macrocell, any of
the global OE signals, always “1”, or always “0”. There are
two global output enables for devices with up to 144 mac-
rocells, and four global output enables for devices with 180
or more macrocells. Both polarities of any of the global
3-state control (GTS) pins may be used within the device.
Figure 10: I/O Block and Output Enable Capability
I/O Block
V
CCIO
Macrocell
X5899_01
Product Term OE
PTOE
Switch Matrix
OUT
(Inversion in
AND-array)
Global OE 1
1
To other
Macrocells
V
CCINT
Slew Rate
Control
0
Global OE 2
Available in
XC95216
and XC95288
Global OE 3
Global OE 4
I/O/GTS1
I/O
I/O/GTS2
I/O/GTS3
I/O/GTS4
To FastCONNECT
User-
Programmable
Ground
Pull-up
Resistor
*
* Pull-up resistors are used to prevent
floating pins during programming
and other times. They are disabled
during normal operations.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC95288-15BG352I | 功能描述:IC CPLD 288 MCELL I-TEMP 352-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件） 系列:XC9500 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時(shí)間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） 包裝:托盤 |
| XC95288-15BGG352C | 制造商:Xilinx 功能描述:XILINX XC95288-15BGG352C CPLD - Trays 制造商:Xilinx 功能描述:Xilinx XC95288-15BGG352C CPLD |
| XC95288-15BGG352I | 制造商:Xilinx 功能描述:XILINX XC95288-15BGG352I CPLD - Trays 制造商:Xilinx 功能描述:Xilinx XC95288-15BGG352I CPLD |
| XC95288-15HQ208C | 功能描述:IC CPLD SPEED GRADE 208-HQFP/COM RoHS:否 類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件） 系列:XC9500 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時(shí)間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） 包裝:托盤 |
| XC9528815HQ208I | 制造商:XILINX 功能描述:* |
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