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Kintex-7 FPGAs Data Sheet: DC and Switching Characteristics
DS182 (v1.1) April 1, 2011
Advance Product Specification
6
LVDS DC Specifications (LVDS_25)
LVDS DC Specifications (LVDS)
eFUSE Read Endurance and Programming Conditions
Table 10 lists the maximum number of read cycle operations expected.
Table 11 lists the programming conditions
specifically for eFUSE. For more information, see
UG470: 7 Series FPGA Configuration User Guide.
Table 8: LVDS_25 DC Specifications
Symbol
DC Parameter
Conditions
Min
Typ
Max
Units
VCCO
Supply Voltage
V
VOH
Output High Voltage for Q and Q
RT = 100 across Q and Q signals
V
VOL
Output Low Voltage for Q and Q
RT = 100 across Q and Q signals
V
VODIFF
Differential Output Voltage (Q – Q),
Q = High (Q –Q), Q =High
RT = 100 across Q and Q signals
mV
VOCM
Output Common-Mode Voltage
RT = 100 across Q and Q signals
V
VIDIFF
Differential Input Voltage (Q – Q),
Q = High (Q –Q), Q =High
mV
VICM
Input Common-Mode Voltage
V
Table 9: LVDS DC Specifications
Symbol
DC Parameter
Conditions
Min
Typ
Max
Units
VCCO
Supply Voltage
V
VOH
Output High Voltage for Q and Q
RT = 100 across Q and Q signals
V
VOL
Output Low Voltage for Q and Q
RT = 100 across Q and Q signals
V
VODIFF
Differential Output Voltage (Q – Q),
Q = High (Q –Q), Q =High
RT = 100 across Q and Q signals
mV
VOCM
Output Common-Mode Voltage
RT = 100 across Q and Q signals
V
VIDIFF
Differential Input Voltage (Q – Q),
Q = High (Q –Q), Q =High
Common-mode input voltage = 1.25V
mV
VICM
Input Common-Mode Voltage
Differential input voltage = ±350 mV
V
Table 10: eFUSE Read Endurance
Symbol
Description
Speed Grade
Units
-3
-2
-1
-1L
DNA_CYCLES
Number of DNA_PORT READ operations or JTAG ISC_DNA read
command operations. Unaffected by SHIFT operations.
Read
Cycles
AES_CYCLES
Number of JTAG FUSE_KEY or FUSE_CNTL read command
operations. Unaffected by SHIFT operations.
Read
Cycles
Table 11: eFUSE Programming Conditions
Symbol
Description
Min
Typ
Max
Units
IFS
VCCAUX supply current
–
40
mA
t j
Temperature range
15
–
85
°C