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參數(shù)資料
| 型號： | XC7K420T-1FFG901C |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | FPGA, PBGA900 |
| 封裝： | LEAD FREE, FBGA-900 |
| 文件頁數(shù)： | 29/50頁 |
| 文件大小： | 1218K |
| 代理商： | XC7K420T-1FFG901C |
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Kintex-7 FPGAs Data Sheet: DC and Switching Characteristics
DS182 (v1.1) April 1, 2011
Advance Product Specification
35
FMAX_CAS_WF_NC
Block RAM Cascade
(Write first, No change mode)
When cascade but not in RF mode
529
475
392
MHz
FMAX_CAS_RF_PERFORMANCE
Block RAM Cascade
(Read first, Performance mode)
When in cascade with RF mode and no
possibility of address overlap/one port is
disabled
529
475
392
MHz
FMAX_CAS_RF_DELAYED_WRITE
When in cascade RF mode and there is a
possibility of address overlap between port
A and port B
492
437
353
MHz
FMAX_FIFO
FIFO in all modes without ECC
601
544
458
MHz
FMAX_ECC
Block RAM and FIFO in ECC configuration
495
427
326
MHz
Notes:
1.
TRACE will report all of these parameters as TRCKO_DO.
2.
TRCKO_DOR includes TRCKO_DOW, TRCKO_DOPR, and TRCKO_DOPW as well as the B port equivalent timing parameters.
3.
These parameters also apply to synchronous FIFO with DO_REG = 0.
4.
TRCKO_DO includes TRCKO_DOP as well as the B port equivalent timing parameters.
5.
These parameters also apply to multirate (asynchronous) and synchronous FIFO with DO_REG = 1.
6.
TRCKO_FLAGS includes the following parameters: TRCKO_AEMPTY, TRCKO_AFULL, TRCKO_EMPTY, TRCKO_FULL, TRCKO_RDERR, TRCKO_WRERR.
7.
TRCKO_POINTERS includes both TRCKO_RDCOUNT and TRCKO_WRCOUNT.
8.
The ADDR setup and hold must be met when EN is asserted (even when WE is deasserted). Otherwise, block RAM data corruption is
possible.
9.
TRCKO_DI includes both A and B inputs as well as the parity inputs of A and B.
10. RDEN and WREN must be held Low prior to and during reset. The FIFO reset must be asserted for at least five positive clock edges of the
slowest clock (WRCLK or RDCLK).
11. TRCO_FLAGS includes the following flags: AEMPTY, AFULL, EMPTY, FULL, RDERR, WRERR, RDCOUNT, and WRCOUNT.
Table 38: Block RAM and FIFO Switching Characteristics (Cont’d)
Symbol
Description
Speed Grade
Units
-3
-2
-1
-1L
相關PDF資料 |
PDF描述 |
|---|---|
| XC7K420T-1FFG901E | FPGA, PBGA900 |
| XC7K420T-1FFG901I | FPGA, PBGA900 |
| XC7K420T-1LFFG1156C | FPGA, PBGA1156 |
| XC7K420T-1LFFG1156E | FPGA, PBGA1156 |
| XC7K420T-1LFFG1156I | FPGA, PBGA1156 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XC7K420T-1FFG901I | 制造商:Xilinx 功能描述:KINTEX-7 - Trays 制造商:Xilinx 功能描述:IC FPGA 380 I/O 901FCBGA 制造商:Xilinx 功能描述:IC FPGA 420K KINTEX-7 901FBGA |
| XC7K420T-2FF1156C | 制造商:Xilinx 功能描述:KINTEX-7 - Trays 制造商:Xilinx 功能描述:IC FPGA 400 I/O 1156FCBGA |
| XC7K420T-2FF1156I | 制造商:Xilinx 功能描述:KINTEX-7 - Trays 制造商:Xilinx 功能描述:IC FPGA 400 I/O 1156FCBGA |
| XC7K420T-2FF901C | 制造商:Xilinx 功能描述:KINTEX-7 - Trays 制造商:Xilinx 功能描述:IC FPGA 420K KINTEX-7 901FBGA |
| XC7K420T-2FF901I | 制造商:Xilinx 功能描述:KINTEX-7 - Trays 制造商:Xilinx 功能描述:IC FPGA 380 I/O 901FCBGA |
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