參數(shù)資料
型號(hào): XC4013E-4HQ240I
廠商: Xilinx Inc
文件頁(yè)數(shù): 44/68頁(yè)
文件大?。?/td> 0K
描述: IC FPGA I-TEMP 5V 4SPD 240-HQFP
產(chǎn)品變化通告: XC1700 PROMs,XC5200,HQ,SCD Parts Discontinuation 19/Jul/2010
標(biāo)準(zhǔn)包裝: 24
系列: XC4000E/X
LAB/CLB數(shù): 576
邏輯元件/單元數(shù): 1368
RAM 位總計(jì): 18432
輸入/輸出數(shù): 192
門數(shù): 13000
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 240-BFQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 240-PQFP(32x32)
R
May 14, 1999 (Version 1.6)
6-53
XC4000E and XC4000X Series Field Programmable Gate Arrays
6
XC4000E/X
UCLK_SYNC
XC4000E/X
UCLK_NOSYNC
XC4000E/X
CCLK_SYNC
XC4000E/X
CCLK_NOSYNC
XC3000
XC2000
CCLK
GSR Active
UCLK Period
DONE IN
Di
Di+1
Di+2
Di
Di+1
Di+2
U2
U3
U4
U2
U3
U4
U2
U3
U4
C1
Synchronization
Uncertainty
Di
Di+1
Di
Di+1
DONE
I/O
GSR Active
DONE
I/O
GSR Active
DONE
C1
C2
C1
U2
C3
C4
C2
C3
C4
C2
C3
C4
I/O
GSR Active
DONE
I/O
DONE
Global Reset
I/O
DONE
Global Reset
I/O
F = Finished, no more
configuration clocks needed
Daisy-chain lead device
must have latest F
Heavy lines describe
default timing
CCLK Period
Length Count Match
F
X9024
C1, C2 or C3
Figure 47: Start-up Timing
Product Obsolete or Under Obsolescence
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