- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4159 > XC4013E-2BG225I (Xilinx Inc)IC FPGA I-TEMP 5V 2SPD 225-PBGA PDF資料下載
參數(shù)資料
| 型號： | XC4013E-2BG225I |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 18/68頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA I-TEMP 5V 2SPD 225-PBGA |
| 產(chǎn)品變化通告： | Product Discontinuation 28/Jul/2010 |
| 標準包裝： | 1 |
| 系列： | XC4000E/X |
| LAB/CLB數(shù)： | 576 |
| 邏輯元件/單元數(shù)： | 1368 |
| RAM 位總計： | 18432 |
| 輸入/輸出數(shù)： | 192 |
| 門數(shù)： | 13000 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 100°C |
| 封裝/外殼： | 225-BBGA |
| 供應商設備封裝： | 225-PBGA |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
R
May 14, 1999 (Version 1.6)
6-29
XC4000E and XC4000X Series Field Programmable Gate Arrays
6
Table 14: Routing per CLB in XC4000 Series Devices
Programmable Switch Matrices
The horizontal and vertical single- and double-length lines
intersect at a box called a programmable switch matrix
(PSM). Each switch matrix consists of programmable pass
transistors used to establish connections between the lines
(see Figure 26).
For example, a single-length signal entering on the right
side of the switch matrix can be routed to a single-length
line on the top, left, or bottom sides, or any combination
thereof, if multiple branches are required. Similarly, a dou-
ble-length signal can be routed to a double-length line on
any or all of the other three edges of the programmable
switch matrix.
Single-Length Lines
Single-length lines provide the greatest interconnect exi-
bility and offer fast routing between adjacent blocks. There
are eight vertical and eight horizontal single-length lines
associated with each CLB. These lines connect the switch-
ing matrices that are located in every row and a column of
CLBs.
Single-length lines are connected by way of the program-
mable switch matrices, as shown in Figure 28. Routing
connectivity is shown in Figure 27.
Single-length lines incur a delay whenever they go through
a switching matrix. Therefore, they are not suitable for rout-
ing signals for long distances. They are normally used to
conduct signals within a localized area and to provide the
branching for nets with fanout greater than one.
x5994
Quad
Single
Double
Long
Direct
Connect
Long
CLB
Long
Global
Clock
Long
Double Single
Global
Clock
Carry
Chain
Direct
Connect
Figure 25: High-Level Routing Diagram of XC4000 Series CLB (shaded arrows indicate XC4000X only)
XC4000E
XC4000X
Vertical Horizontal Vertical Horizontal
Singles
8
Doubles
4
Quads
0
12
Longlines
6
10
6
Direct
Connects
00
2
Globals
4
0
8
0
Carry Logic
2
0
1
0
Total
24
18
45
32
Six Pass Transistors
Per Switch Matrix
Interconnect Point
Singles
Double
Singles
Double
X6600
Figure 26: Programmable Switch Matrix (PSM)
Product Obsolete or Under Obsolescence
相關PDF資料 |
PDF描述 |
|---|---|
| XC4013E-2BG225C | IC FPGA C-TEMP 5V 2SPD 225-PBGA |
| 485897-2 | CONN PLUG 4POS HOUSING W/DETENT |
| 1-487769-3 | 015 HOUSING FFC RCPT 100CL SR |
| IDT71V546XS100PFG | IC SRAM 4MBIT 100MHZ 100TQFP |
| 487769-4 | CONN RECEPT 6 POS .100 SLIMLINE |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XC4013E-2BG240C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Programmable Gate Arrays |
| XC4013E-2BG240I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Programmable Gate Arrays |
| XC4013E-2BG240M | 制造商:XILINX 制造商全稱:XILINX 功能描述:Programmable Gate Arrays |
| XC4013E-2CB240C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Programmable Gate Arrays |
| XC4013E-2CB240I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Programmable Gate Arrays |
發(fā)布緊急采購，3分鐘左右您將得到回復。