參數(shù)資料
型號: XC4000A
廠商: Xilinx, Inc.
英文描述: LAMP
中文描述: 邏輯單元陣列系列
文件頁數(shù): 2/16頁
文件大?。?/td> 97K
代理商: XC4000A
XC4000A Logic Cell Array Family
2-72
Absolute Maximum Ratings
Symbol Description
Units
V
CC
Supply voltage relative to GND
–0.5 to +7.0
V
V
IN
Input voltage with respect to GND
–0.5 to V
CC
+0.5
V
V
TS
Voltage applied to 3-state output
–0.5 to V
CC
+0.5
V
T
STG
Storage temperature (ambient)
–65 to + 150
°
C
T
SOL
Maximum soldering temperature (10 s @ 1/16 in. = 1.5 mm)
+ 260
°
C
T
J
Junction temperature
+ 150
°
C
Note:
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
listed under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions
for extended periods of time may affect device reliability.
Operating Conditions
Symbol
Description
Min
Max
Units
V
CC
Supply voltage relative to GND Commercial 0
°
C to 85
°
C junction
4.75
5.25
V
Supply voltage relative to GND Industrial -40
°
C to 100
°
C junction
4.5
5.5
V
Supply voltage relative to GND
Military –55
°
C to 125
°
C case
4.5
5.5
V
V
IH
High-level input voltage (XC4000 has TTL-like input thresholds)
2.0
V
CC
V
V
IL
Low-level input voltage (XC4000 has TTL-like input thresholds)
0
0.8
V
T
IN
Input signal transition time
250
ns
DC Characteristics Over Operating Conditions
Symbol
Description
Min
Max
Units
V
OH
High-level output voltage @ I
OH
= –4.0 mA, V
CC
min
2.4
V
V
OL
Low-level output voltage @ I
OL
= 24 mA, V
CC
min (Note 1)
0.4
V
I
CCO
Quiescent LCA supply current (Note 2)
10
mA
I
IL
Leakage current
–10
+10
μ
A
C
IN
Input capacitance (sample tested)
15
pF
I
RIN
Pad pull-up (when selected) @ V
IN
= 0V (sample tested)
0.02
0.25
mA
I
RLL
Horizontal Long Line pull-up (when selected) @ logic Low
0.2
2.5
mA
Note: 1. With 50% of the outputs simultaneously sinking 24 mA.
2. With no output current loads, no active input or longline pull-up resistors, all package pins at V
CC
or GND, and
the LCA configured with a MakeBits tie option.
At junction temperatures above those listed as Operating conditions, all delay parameters increase by 0.35% per
°
C.
相關PDF資料
PDF描述
XC4002A Logic Cell Array Family
XC4003A Logic Cell Array Family
XC4004A Logic Cell Array Family
XC4005A Logic Cell Array Family
XC4005A-5PQ160C Logic Cell Array Family
相關代理商/技術參數(shù)
參數(shù)描述
XC4000D 制造商:XILINX 制造商全稱:XILINX 功能描述:Logic Cell Array
XC4000E 制造商:XILINX 制造商全稱:XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4000ESERIES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Programmable Gate Arrays
XC4000FM 制造商:XILINX 制造商全稱:XILINX 功能描述:Logic Cell Array Families
XC4000H 制造商:XILINX 制造商全稱:XILINX 功能描述:Logic Cell Array Families