參數(shù)資料
型號: XC3S1000-4PQ208C
廠商: XILINX INC
元件分類: FPGA
英文描述: Spartan-3 FPGA Family: Complete Data Sheet
中文描述: FPGA, 192 CLBS, 50000 GATES, PQFP208
封裝: PLASTIC, QFP-208
文件頁數(shù): 105/198頁
文件大?。?/td> 1605K
代理商: XC3S1000-4PQ208C
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Spartan-3 FPGA Family: Pinout Descriptions
DS099-4 (v1.6) January 17, 2005
Product Specification
www.xilinx.com
19
R
Setting Options via BitGen Command-Line
Program
To set one or more bitstream generator options using the
BitGen command-line program, enter
bitgen –g <variable_name>:<value>
[<variable_name>:<value> …]
where
<
variable_name
>
is one of the entries from
Table 11
and
<
value
>
is one of the possible values for the
specified variable. Multiple bitstream options may be
entered in this manner.
For a complete listing of all BitGen options, their possible
settings, and their default settings, enter the following com-
mand.
bitgen -help spartan3
PROG_B
A weak pull-up resistor to VCCAUX exists on PROG_B during
configuration. After configuration, this bitstream option either
pulls DONE to VCCAUX via a weak pull-up resistor, or allows
DONE to float.
ProgPin
Pullup
Pullnone
DONE
After configuration, this bitstream option either pulls DONE to
VCCAUX via a weak pull-up resistor, or allows DONE to float. See
also DriveDone option.
DonePin
Pullup
Pullnone
DONE
If set to Yes, this option allows the FPGA’s DONE pin to drive High
when configuration completes. By default, the DONE is an
open-drain output and can only drive Low. Only single FPGAs and
the last FPGA in a multi-FPGA daisy-chain should use this option.
DriveDone
No
Yes
M2
After configuration, this bitstream option either pulls M2 to
VCCAUX via a weak pull-up resistor, to ground via a weak
pull-down resistor, or allows M2 to float.
M2Pin
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
Pullup
Pulldown
Pullnone
M1
After configuration, this bitstream option either pulls M1 to
VCCAUX via a weak pull-up resistor, to ground via a weak
pull-down resistor, or allows M1 to float.
M1Pin
M0
After configuration, this bitstream option either pulls M0 to
VCCAUX via a weak pull-up resistor, to ground via a weak
pull-down resistor, or allows M0 to float.
M0Pin
HSWAP_EN
After configuration, this bitstream option either pulls HSWAP_EN
to VCCAUX via a weak pull-up resistor, to ground via a weak
pull-down resistor, or allows HSWAP_EN to float.
HswapenPin
TDI
After configuration, this bitstream option either pulls TDI to
VCCAUX via a weak pull-up resistor, to ground via a weak
pull-down resistor, or allows TDI to float.
TdiPin
TMS
After configuration, this bitstream option either pulls TMS to
VCCAUX via a weak pull-up resistor, to ground via a weak
pull-down resistor, or allows TMS to float.
TmsPin
TCK
After configuration, this bitstream option either pulls TCK to
VCCAUX via a weak pull-up resistor, to ground via a weak
pull-down resistor, or allows TCK to float.
TckPin
TDO
After configuration, this bitstream option either pulls TDO to
VCCAUX via a weak pull-up resistor, to ground via a weak
pull-down resistor, or allows TDO to float.
TdoPin
Table 11:
Bitstream Options Affecting Spartan-3 Pins
(Continued)
Affected Pin
Name(s)
Bitstream Generation Function
Option
Variable
Name
Values
(default
value)
相關(guān)PDF資料
PDF描述
XC3S1000-4PQ208I Spartan-3 FPGA Family: Complete Data Sheet
XC3S1000-4PQG208C Spartan-3 FPGA Family: Complete Data Sheet
XC3S1000-4PQG208I Spartan-3 FPGA Family: Complete Data Sheet
XC3S1000-4TQ144I Spartan-3 FPGA Family: Complete Data Sheet
XC3S1000-4TQG144C Spartan-3 FPGA Family: Complete Data Sheet
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC3S1000-4PQ208I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3 FPGA
XC3S1000-4PQG208C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3 FPGA Family: Complete Data Sheet
XC3S1000-4PQG208I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3 FPGA Family: Complete Data Sheet
XC3S1000-4TQ144C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3 FPGA
XC3S1000-4TQ144I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3 FPGA