參數(shù)資料
型號: XC3042A-6PG132C
廠商: XILINX INC
元件分類: FPGA
英文描述: Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
中文描述: FPGA, 144 CLBS, 2000 GATES, 135 MHz, CPGA132
封裝: CERAMIC, PGA-132
文件頁數(shù): 10/50頁
文件大?。?/td> 474K
代理商: XC3042A-6PG132C
XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families
2-112
X2662
Figure 8.
XACT Development System
Locations of interconnect access, CLB control inputs, logic inputs and outputs. The dot
pattern represents the available programmable interconnection points (PIPs).
Some of the interconnect PIPs are directional. This is indicated on the XACT design editor status line:
ND is a nondirectional interconnection.
D:H->V is a PIP that drives from a horizontal to a vertical line.
D:V->H is a PIP that drives from a vertical to a horizontal line.
D:C->T is a “T” PIP that drives from a cross of a T to the tail.
D:CW is a corner PIP that drives in the clockwise direction.
P0 indicates the PIP is non-conducting , P1 is on.
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