參數(shù)資料
型號(hào)： XC2S15-5TQ144C
廠商： Xilinx Inc
文件頁數(shù)： 12/99頁
文件大?。?/td> 0K
描述： IC FPGA 2.5V 96 CLB'S 144-PQFP
標(biāo)準(zhǔn)包裝： 60
系列： Spartan®-II
LAB/CLB數(shù)： 96
邏輯元件/單元數(shù)： 432
RAM 位總計(jì)： 16384
輸入/輸出數(shù)： 86
門數(shù)： 15000
電源電壓： 2.375 V ~ 2.625 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 144-LQFP
供應(yīng)商設(shè)備封裝： 144-TQFP（20x20）
產(chǎn)品目錄頁面： 599 (CN2011-ZH PDF)
其它名稱： 122-1218
XC2S15-5TQ144C-ND
DS001-1 (v2.8) June 13, 2008
Module 1 of 4
Product Specification
2
2000-2008 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. All other
trademarks are the property of their respective owners.
Introduction
The Spartan-II Field-Programmable Gate Array family
gives users high performance, abundant logic resources,
and a rich feature set, all at an exceptionally low price. The
six-member family offers densities ranging from 15,000 to
200,000 system gates, as shown in Table 1. System
performance is supported up to 200 MHz. Features include
block RAM (to 56K bits), distributed RAM (to 75,264 bits),
16 selectable I/O standards, and four DLLs. Fast,
predictable interconnect means that successive design
iterations continue to meet timing requirements.
The Spartan-II family is a superior alternative to
mask-programmed ASICs. The FPGA avoids the initial
cost, lengthy development cycles, and inherent risk of
conventional ASICs. Also, FPGA programmability permits
design upgrades in the field with no hardware replacement
necessary (impossible with ASICs).
Features
Second generation ASIC replacement technology
-
Densities as high as 5,292 logic cells with up to
200,000 system gates
-
Streamlined features based on Virtex FPGA
architecture
-
Unlimited reprogrammability
-
Very low cost
-
Cost-effective 0.18 micron process
System level features
-
SelectRAM hierarchical memory:
16 bits/LUT distributed RAM
Configurable 4K bit block RAM
Fast interfaces to external RAM
-
Fully PCI compliant
-
Low-power segmented routing architecture
-
Full readback ability for verification/observability
-
Dedicated carry logic for high-speed arithmetic
-
Efficient multiplier support
-
Cascade chain for wide-input functions
-
Abundant registers/latches with enable, set, reset
-
Four dedicated DLLs for advanced clock control
-
Four primary low-skew global clock distribution
nets
-
IEEE 1149.1 compatible boundary scan logic
Versatile I/O and packaging
-
Pb-free package options
-
Low-cost packages available in all densities
-
Family footprint compatibility in common packages
-
16 high-performance interface standards
-
Hot swap Compact PCI friendly
-
Zero hold time simplifies system timing
Core logic powered at 2.5V and I/Os powered at 1.5V,
2.5V, or 3.3V
Fully supported by powerful Xilinx ISE development
system
-
Fully automatic mapping, placement, and routing
6
Spartan-II FPGA Family:
Introduction and Ordering
Information
DS001-1 (v2.8) June 13, 2008
0
Product Specification
R
Table 1: Spartan-II FPGA Family Members
Device
Logic
Cells
System Gates
(Logic and RAM)
CLB
Array
(R x C)
Total
CLBs
Maximum
Available
User I/O(1)
Total
Distributed RAM
Bits
Total
Block RAM
Bits
XC2S15
432
15,000
8 x 12
96
86
6,144
16K
XC2S30
972
30,000
12 x 18
216
92
13,824
24K
XC2S50
1,728
50,000
16 x 24
384
176
24,576
32K
XC2S100
2,700
100,000
20 x 30
600
176
38,400
40K
XC2S150
3,888
150,000
24 x 36
864
260
55,296
48K
XC2S200
5,292
200,000
28 x 42
1,176
284
75,264
56K
Notes:
1.
All user I/O counts do not include the four global clock/user input pins. See details in Table 2, page 4.
相關(guān)PDF資料
PDF描述
VE-J6F-CW CONVERTER MOD DC/DC 72V 100W
MAX1617AMEE IC TEMP SENSOR SMBUS SRL 16-QSOP
GBM18DSEI-S243 CONN EDGECARD 36POS .156 EYELET
VE-J60-CW CONVERTER MOD DC/DC 5V 100W
VJ1206A471KBEAT4X CAP CER 470PF 500V 10% NP0 1206
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC2S15-5TQ144I 功能描述:IC FPGA 2.5V I-TEMP 144-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-II 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA（27x27）
XC2S15-5TQG144C 制造商:Xilinx 功能描述:FPGA SPARTAN-II 15K GATES 432 CELLS 263MHZ 2.5V 144TQFP EP - Trays 制造商:Xilinx 功能描述:IC SYSTEM GATE 制造商:Xilinx 功能描述:XC2S15-5TQG144C
XC2S15-5TQG144I 制造商:Xilinx 功能描述:IC SYSTEM GATE 制造商:Xilinx 功能描述:FPGA SPARTAN-II 15K GATES 432 CELLS 263MHZ 2.5V 144TQFP EP - Trays
XC2S15-5VQ100C 功能描述:IC FPGA 2.5V 96 CLB'S 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-II 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA（27x27）
XC2S15-5VQ100I 功能描述:IC FPGA 2.5V I-TEMP 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-II 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA（27x27）
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*