參數(shù)資料
型號: X98024L128-3.3-Z
廠商: INTERSIL CORP
元件分類: 消費家電
英文描述: 240MHz Triple Video Digitizer with Digital PLL
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP128
封裝: 14 X 20 MM, ROHS COMPLIANT, MS-022, MQFP-128
文件頁數(shù): 28/29頁
文件大?。?/td> 295K
代理商: X98024L128-3.3-Z
28
FN8220.0
June 6, 2005
X98024 Serial Bus Address Write
This is the 7 bit address of the X98024 on the 2 wire bus. The
address is 0x4C if pin 48 is low, 0x4D if pin 48 is high. R/W = 0,
indicating next transaction will be a write.
A0
A7
A2
A4
A3
A1
A6
A5
1
0
0
0
1
A
(pin 48)
0
1
R/W
X98024 Register Address Write
This sets the initial address of the X98024’s configuration
register for subsequent reading
Ends the previous transaction and starts a new one
X98024 Serial Bus Address
START Command
Signals the beginning of serial I/O
X98024 Serial Bus Address Write
This is the 7 bit address of the X98024 on the 2 wire bus. The
address is 0x4C if pin 48 is low, 0x4D if pin 48 is high. R/W = 1,
indicating next transaction(s) will be a read.
D7
D6
D5
D2
D4
D3
D1
D0
X98024 Register Data Read(s)
This is the data read from the X98024’s configuration register.
Note: The X98024’s Configuration Register’s address pointer auto
increments after each data read: repeat this step to read multiple
sequential bytes of data from the Configuration Register.
1
0
0
0
1
A
(pin 48)
1
1
R/W
X98024 Serial Bus Address
START Command
STOP Command
(Repeat if desired)
Signals the ending of serial I/O
S
T
A
R
T
S
T
O
P
Data
Read*
SDA Bus
Signals from
the X98024
Signals from
the Host
Register
Address
Serial Bus
Address
A
C
K
aaaaaaaa
A
C
K
dddddddd
A
C
K
100110A0
* The data read step may be repeated to read
from the X98024’s Configuration Register
sequentially, beginning at the Register
Address written in the two steps previous.
R
E
S
T
A
R
T
Serial Bus
Address
A
C
K
100110A1
FIGURE 16. CONFIGURATION REGISTER READ
X98024
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