參數(shù)資料
型號(hào)： X98017
廠商： Intersil Corporation
英文描述： 170MHz Triple Video Digitizer with Digital PLL
中文描述： 170MHz的三路視頻數(shù)字化與數(shù)字鎖相環(huán)
文件頁(yè)數(shù)： 17/29頁(yè)
文件大?。?/td> 295K
代理商： X98017
17
FN8218.0
June 6, 2005
Input Coupling
Inputs can be either AC-coupled (default) or DC-coupled
(see register 0x05[1]). AC coupling is usually preferred since
it allows video signals with substantial DC offsets to be
accurately digitized. The X98017 provides a complete
internal DC-restore function, including the DC restore clamp
(See Figure 7) and programmable clamp timing (registers
0x14, 0x15, 0x16, and 0x23).
When AC-coupled, the DC restore clamp is applied every
line, a programmable number of pixels after the trailing edge
of HSYNC. If register 0x05[5] = 0 (the default), the clamp will
not be applied while the DPLL is coasting, preventing any
clamp voltage errors from composite sync edges,
equalization pulses, or Macrovision signals.
After the trailing edge of HSYNC, the DC restore clamp is
turned on after the number of pixels specified in the DC
Restore and ABLC Starting Pixel registers (0x14 and
0x15) has been reached. The clamp is applied for the
number of pixels specified by the DC Restore Clamp Width
Register (0x16). The clamp can be applied to the back porch
of the video, or to the front porch (by increasing the DC
Restore and ABLC Starting Pixel registers so all the active
video pixels are skipped).
If DC-coupled operation is desired, the input to the ADC will
be the difference between the input signal (R
IN
1, for
example) and that channel’s ground reference (RGB
GND
1 in
that example).
SOG
For component YUV signals, the sync signal is embedded
on the Y channel’s video, which is connected to the green
input, hence the name SOG (Sync on Green). The horizontal
sync information is encoded onto the video input by adding
the sync tip during the blanking interval. The sync tip level is
typically 0.3V below the video black level.
To minimize the loading on the green channel, the SOG
input for each of the green channels should be AC-coupled
to the X98017 through a series combination of a 10nF
capacitor and a 500
Ω
resistor. Inside the X98017, a window
comparator compares the SOG signal with an internal 4 bit
programmable threshold level reference ranging from 0mV
to 300mV below the minimum sync level. The SOG
threshold level, hysteresis, and low-pass filter is
programmed via register 0x04. If the Sync-On-Green
function is not needed, the SOG
IN
pin(s) may be left
unconnected.
R(GB)
IN
1
R(GB)
GND
1
V
CLAMP
V
IN
+
V
IN
–
DC Restore
Clamp DAC
VGA1
CLAMP
GENERATION
DC Restoration
Automatic Black Level
Compensation (ABLC) Loop
Bandwidth
Control
Offset
Control
Registers
8 bit ADC
Offset
ADC
To Output
Formatter
Fixed
Offset
Fixed
Offset
0x00
8
ABLC
ABLC
ABLC
10
10
10
8
8
8
8
PGA
To
ABLC
Block
Input
Bandwidth
VGA2
R(GB)
IN
2
R(GB)
GND
2
FIGURE 7. VIDEO FLOW (INCLUDING ABLC)
X98017
相關(guān)PDF資料
PDF描述
X98017L128-3.3 GIGATRUE 550 CAT PATCH CABLE NO BOOT 20FT BLACK
X98017L128-3.3-Z GIGATRUE 550 CAT PATCH CBL NO BOOT 20FT BK 25 PK
X98021 210MHz Triple Video Digitizer with Digital PLL
X98021L128-3.3 210MHz Triple Video Digitizer with Digital PLL
X98021L128-3.3-Z 210MHz Triple Video Digitizer with Digital PLL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
X98017_06 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:170MHz Triple Video Digitizer with Digital PLL
X98017L128-3.3 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述:
X98017L128-3.3-Z 功能描述:IC VIDEO DIGITIZER TRPL 128MQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類型:電平移位器 應(yīng)用:LCD 電視機(jī)/監(jiān)控器 安裝類型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:28-WQFN（4x4）裸露焊盤 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND
X98021 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:210MHz Triple Video Digitizer with Digital PLL
X98021_06 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:210MHz Triple Video Digitizer with Digital PLL
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