參數(shù)資料
型號: X9470V24I
廠商: INTERSIL CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: RF Power Amplifier (PA) Bias Controller
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO24
封裝: PLASTIC, TSSOP-24
文件頁數(shù): 8/25頁
文件大小: 542K
代理商: X9470V24I
PeimnayInomaion
8 of 25
REV 11.16 3/20/03
www.xicor.com
Preliminary Information
X9470
AC SPECIFICATIONS
Note:
(12) Cb = total capacitance of one bus line in pF.
TIMING DIAGRAMS
Bus Timing
Symbol
SCL
t
IN
(10)
t
AA
(10)
t
BUF
(10)
t
LOW
t
HIGH
t
SU:STA
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
DH
(10)
t
R
(10)
t
F
(10)
Cb
(10)
Parameter
Min.
50
0.1
1.3
1.3
0.6
0.6
0.6
200
200
0.6
50
Max.
Unit
kHz
ns
μs
μs
μs
μs
μs
μs
ns
ns
μs
ns
ns
ns
pF
Pulse width Suppression Time at inputs
SCL LOW to SDA Data Out Valid
Time the bus must be free before a new transmission can start
Clock LOW Time
Clock HIGH Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive load for each bus line
0.9
20 +.1Cb
(12)
20 +.1Cb
(12)
300
300
400
t
SU:STO
t
DH
t
HIGH
t
SU:ST
t
HD:STA
t
HD:DAT
t
SU:DAT
SCL
SDA IN
SDA OUT
t
F
t
LOW
t
BUF
t
AA
t
R
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