Host Interface Pins Serial Output (SO) SO is a push/pull serial data output pin. During a read cycle" />
參數(shù)資料
型號(hào)： X9420YS16Z-2.7T1
廠商： Intersil
文件頁(yè)數(shù)： 13/19頁(yè)
文件大?。?/td> 0K
描述： IC DGTL POT 2.5K 1CH 16SOIC
標(biāo)準(zhǔn)包裝： 1,000
系列： XDCP™
接片： 64
電阻（歐姆）： 2.5k
電路數(shù)： 1
溫度系數(shù)： 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類型： 非易失
接口： SPI 串行
電源電壓： 2.7 V ~ 5.5 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC
包裝： 帶卷 (TR)
3
FN8195.1
April 26, 2006
PIN DESCRIPTIONS
Host Interface Pins
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked
out by the falling edge of the serial clock.
Serial Input
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the potentiometer
and pot register are input on this pin. Data is latched
by the rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9420.
Chip Select (CS)
When CS is HIGH, the X9420 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9420, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
Device Address (A0)
The address inputs is used to set the least significant
bit of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9420. A maximum of 2 devices may occupy the
SPI serial bus.
Potentiometer Pins
VH/RH, VL/RL
The VH/RH and VL/RL input are equivalent to the
terminal connections on either end of a mechanical
potentiometer.
VW/RW
The wiper output is equivalent to the wiper output of a
mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers. Writing to the Wiper Counter
Register is not restricted.
Analog Supplies (V+, V-)
The analog supplies V+, V- are the supply voltages for
the XDCP analog section.
System/Digital Supply (VCC)
VCC is the supply voltage for the system/digital
section. VSS is the system ground.
PIN CONFIGURATION
VCC
CS
RL/VL
SI
WP
VSS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V+
NC
A0
SO
HOLD
SCK
NC
V-
DIP/SOIC
X9420
RH/VH
RW/VW
TSSOP
VCC
CS
RL/VL
SI
WP
VSS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V+
A0
SO
HOLD
SCK
V-
X9420
RH/VH
RW/VW
X9420
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
X9420YS16ZT1 功能描述:IC DGTL POT 2.5K 1CH 16SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲(chǔ)器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR)
X9420YS-2.7 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally Controlled (XDCP) Potentiometer
X9420YSI 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Digitally Controlled (XDCP) Potentiometer
X9420YSI-2.7 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally Controlled (XDCP) Potentiometer
X9420YSM 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally Controlled (XDCP) Potentiometer
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