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參數(shù)資料
| 型號： | X9418YV24Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP DUAL 64TAP 2.5K 24-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 62 |
| 系列： | XDCP™ |
| 接片： | 64 |
| 電阻（歐姆）： | 2.5k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 管件 |
5
FN8194.3
October 12, 2006
Figure 2. Instruction Byte Format
The four high order bits define the instruction. The
next two bits (R1 and R0) select one of the four
registers that is to be acted upon when a register
oriented instruction is issued. The last bits (P0) select
which one of the two potentiometers is to be affected
by the instruction. Bit 1 is defined to be 0.
Four of the nine instructions end with the transmission
of the instruction byte. The basic sequence is
illustrated in Figure 3. These two-byte instructions
exchange data between the wiper counter register and
one of the data registers. A transfer from a Data
Register to a Wiper Counter Register is essentially a
write to a static RAM. The response of the wiper to this
action will be delayed tWRL. A transfer from the wiper
counter register (current wiper position), to a Data
Register is a write to nonvolatile memory and takes a
minimum of tWR to complete. The transfer can occur
between one of the two potentiometers and one of its
associated registers; or it may occur globally, wherein
the
transfer
occurs
between
both
of
the
potentiometers and one of their associated registers.
Four instructions require a three-byte sequence to
complete. These instructions transfer data between
the host and the X9418; either between the host and
one of the Data Registers or directly between the host
and the wiper counter register. These instructions are:
Read Wiper Counter Register (read the current wiper
position of the selected pot), write Wiper Counter
Register (change current wiper position of the selected
pot), read Data Register (read the contents of the
selected nonvolatile register) and write Data Register
(write a new value to the selected Data Register). The
sequence of operations is shown in Figure 4.
The Increment/Decrement command is different from
the other commands. Once the command is issued
and the X9418 has responded with an acknowledge,
the master can clock the selected wiper up and/or
down in one segment steps; thereby, providing a fine
tuning capability to the host. For each SCL clock pulse
(tHIGH) while SDA is HIGH, the selected wiper will
move one resistor segment towards the VH/RH
terminal. Similarly, for each SCL clock pulse while
SDA is LOW, the selected wiper will move one resistor
segment towards the VL/RL terminal. A detailed
illustration of the sequence and timing for this
Figure 3. Two-Byte Instruction Sequence
I1
I2
I3
I0
R1
R0
0
P0
Wiper Counter
Register Select
Register
Select
Instructions
S
T
A
R
T
0101
A3 A2 A1 A0
A
C
K
I3
I2
I1
I0
R1 R0 0
P0
A
C
K
SCL
SDA
S
T
O
P
X9418
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9418YV24Z-2.7 | 功能描述:IC XDCP DUAL 64TAP 2.5K 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9420 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally Controlled (XDCP) Potentiometer |
| X9420_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Digitally Controlled Potentiometer |
| X9420-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Digitally Controlled (XDCP) Potentiometer |
| X9420WP | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally Controlled (XDCP) Potentiometer |
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