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參數(shù)資料
| 型號： | X9410WV24M |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Digital Potentiometer |
| 中文描述： | 數(shù)字電位器 |
| 文件頁數(shù)： | 5/21頁 |
| 文件大小： | 123K |
| 代理商： | X9410WV24M |
X9410
Characteristics subject to change without notice.
5 of 21
REV 1.1 10/6/00
www.xicor.com
Figure 3. Instruction Byte Format
The four high order bits of the instruction byte specify
the operation. The next two bits (R
1
and R
0
) select one
of the four registers that is to be acted upon when a
register oriented instruction is issued. The last bit (P
0
)
selects which one of the two potentiometers is to be
affected by the instruction.
Four of the ten instructions are two bytes in length and
end with the transmission of the instruction byte. These
instructions are:
– XFR Data Register to Wiper Counter Register—This
transfers the contents of one specified Data Register
to the associated Wiper Counter Register.
– XFR Wiper Counter Register to Data Register—This
transfers the contents of the specified Wiper Counter
Register to the specified associated Data Register.
– Global XFR Data Register to Counter Register—This
transfers the contents of both specified Data Registers
to the associated Wiper Counter Registers.
– Global XFR Wiper Counter Register to Data Register—
This transfers the contents of both Wiper Counter
Registers to the specified associated Data Registers.
The basic sequence of the two byte instructions is
illustrated in Figure 4. These two-byte instructions
exchange data between the WCR and one of the data
registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the
wiper to this action will be delayed by t
WRL
. A transfer
from the WCR (current wiper position), to a data register
is a write to nonvolatile memory and takes a minimum
of t
WR
to complete. The transfer can occur between
one of the two potentiometers and one of its associated
registers; or it may occur globally, where the transfer
occurs between both potentiometers and one
associated register.
Five instructions require a three-byte sequence to
complete. These instructions transfer data between the
host and the X9410; either between the host and one
of the data registers or directly between the host and
the Wiper Counter Register. These instructions are:
– Read Wiper Counter Register—read the current
wiper position of the selected pot,
– Write Wiper Counter Register—change current wiper
position of the selected pot,
– Read Data Register—read the contents of the
selected data register;
– Write Data Register—write a new value to the
selected data register.
– Read Status—This command returns the contents of
the WIP bit which indicates if the internal write cycle
is in progress.
The sequence of these operations is shown in Figure 5
and Figure 6.
The final command is Increment/Decrement. It is
different from the other commands because it’s length
is indeterminate. Once the command is issued, the
master can clock the selected wiper up and/or down in
one resistor segment steps, thereby providing a fine
tuning capability to the host. For each SCK clock pulse
(t
HIGH
) while SI is HIGH, the selected wiper will move
one resistor segment towards the V
H
/R
H
terminal.
Similarly, for each SCK clock pulse while SI is LOW, the
selected wiper will move one resistor segment towards
the V
L
/R
L
terminal. A detailed illustration of the
sequence and timing for this operation are shown in
Figures 7-8.
I1
I2
I3
I0
R1
R0
0
P0
Pot Select
Register
Select
Instructions
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X9410WV24M-2.7 | Digital Potentiometer |
| X9410WV24 | Low Noise/Low Power/SPI Bus |
| X9410WV24-2.7 | Low Noise/Low Power/SPI Bus |
| X9410WV24I | Low Noise/Low Power/SPI Bus |
| X9410WV24I-2.7 | Low Noise/Low Power/SPI Bus |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9410WV24M-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital Potentiometer |
| X9410WV24T1 | 功能描述:IC XDCP DUAL 64-TAP 10K 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲器類型:易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
| X9410WV24Z | 功能描述:IC XDCP DUAL 64-TAP 10K 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲器類型:易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
| X9410WV24Z-2.7 | 功能描述:IC XDCP DUAL 64-TAP 10K 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲器類型:易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
| X9410WV24Z-2.7T1 | 功能描述:IC XDCP DUAL 64-TAP 10K 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲器類型:易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
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