參數(shù)資料
型號(hào): X9410WV24I-2.7
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計(jì)
英文描述: Low Noise/Low Power/SPI Bus
中文描述: DUAL 10K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24
封裝: 4.40 MM, TSSOP-24
文件頁(yè)數(shù): 1/21頁(yè)
文件大?。?/td> 123K
代理商: X9410WV24I-2.7
REV 1.1 10/6/00
Characteristics subject to change without notice.
1 of 21
www.xicor.com
Low Noise/Low Power/SPI Bus
X9410
Dual Digitally Controlled Potentiometer (XDCP
)
FEATURES
Two potentiometers in one package
SPI serial interface
Register oriented format
—Direct read/write/transfer wiper positions
—Store as many as four positions per
potentiometer
Power supplies
—V
CC
= 2.7V to 5.5V
—V+ = 2.7V to 5.5V
—V– = –2.7V to –5.5V
Low power CMOS
—Standby current < 1μA
High reliability
—Endurance–100,000 data changes per bit per
register
—Register data retention–100 years
8-bytes of nonvolatile EEPROM memory
10K
resistor arrays
Resolution: 64 taps each pot
24-lead TSSOP, 24-lead SOIC and 24-pin plastic
DIP packages
DESCRIPTION
The X9410 integrates two digitally controlled
potentiometers (XDCP) on a monolithic CMOS
integrated microcircuit.
The digitally controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the SPI bus
interface. Each potentiometer has associated with it a
volatile Wiper Counter Register (WCR) and 4
nonvolatile Data Registers (DR0:DR3) that can be
directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the
resistor array through the switches. Power up recalls
the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
BLOCK DIAGRAM
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot1
V
H1
/R
H1
V
L1
/R
L1
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Interface
and
Control
Circuitry
CS
SCK
SO
A0
A1
V
H0
/R
H0
V
L0
/R
L0
Data
8
V
W0
/R
W0
V
W1
/R
W1
SI
HOLD
WP
Pot 0
V
CC
V
SS
V+
V-
Pot 1
A
PPLICATION
N
OTES
A V A I L A B L E
AN99 AN115 AN120 AN124 AN133 AN134 AN135
相關(guān)PDF資料
PDF描述
X9410YV24 Low Noise/Low Power/SPI Bus
X9410YV24-2.7 Low Noise/Low Power/SPI Bus
X9410YV24I Low Noise/Low Power/SPI Bus
X9410YV24I-2.7 Low Noise/Low Power/SPI Bus
X9410YV24IZ Low Noise/Low Power/SPI Bus
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