參數(shù)資料
型號: X9410WV24I
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: Low Noise/Low Power/SPI Bus
中文描述: DUAL 10K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24
封裝: 4.40 MM, TSSOP-24
文件頁數(shù): 4/21頁
文件大?。?/td> 123K
代理商: X9410WV24I
X9410
Characteristics subject to change without notice.
4 of 21
REV 1.1 10/6/00
www.xicor.com
Write in Process
The contents of the Data Registers are saved to
nonvolatile memory when the CS pin goes from LOW
to HIGH after a complete write sequence is received by
the device. The progress of this internal write operation
can be monitored by a Write In Process bit (WIP). The
WIP bit is read with a Read Status command.
INSTRUCTIONS
Identification (ID) Byte
The first byte sent to the X9410 from the host, following
a CS going HIGH to LOW, is called the Identification
byte. The most significant four bits of the slave address
are a device type identifier, for the X9410 this is fixed
as 0101[B] (refer to Figure 2).
The two least significant bits in the ID byte select one of
four devices on the bus. The physical device address is
defined by the state of the A
0
-A
1
input pins. The X9410
compares the serial data stream with the address input
state; a successful compare of both address bits is
required for the X9410 to successfully continue the
command sequence. The A
0
–A
1
inputs can be actively
driven by CMOS input signals or tied to V
CC
or V
SS
.
The remaining two bits in the ID byte must be set to 0.
Figure 2. Identification Byte Format
Instruction Byte
The next byte sent to the X9410 contains the
instruction and register pointer information. The four
most significant bits are the instruction. The next four
bits point to one of the two pots and when applicable
they point to one of four associated registers. The
format is shown below in Figure 3.
1
0
0
0
0
A1
A0
Device Type
Identifier
Device Address
1
Figure 1. Detailed Potentiometer Block Diagram
Serial Data Path
From Interface
Circuitry
Register 0
Register 1
Register 2
Register 3
Serial
Bus
Input
Parallel
Bus
Input
Wiper
Counter
Register
(WCR)
INC/DEC
Logic
UP/DN
CLK
Modified SCL
UP/DN
V
H
/R
H
V
L
/R
L
V
W
/R
W
If WCR = 00[H] then V
W
/R
W
= V
L
/R
L
If WCR = 3F[H] then V
W
/R
W
= V
H
/R
H
8
6
C
o
u
n
t
e
r
D
e
c
o
d
e
(One of Two Arrays)
相關(guān)PDF資料
PDF描述
X9410WV24I-2.7 Low Noise/Low Power/SPI Bus
X9410YV24 Low Noise/Low Power/SPI Bus
X9410YV24-2.7 Low Noise/Low Power/SPI Bus
X9410YV24I Low Noise/Low Power/SPI Bus
X9410YV24I-2.7 Low Noise/Low Power/SPI Bus
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