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參數(shù)資料
| 型號： | X9258TS24Z |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Quad Digital Controlled Potentiometers |
| 中文描述： | QUAD 100K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-013ADC, SOIC-24 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 334K |
| 代理商： | X9258TS24Z |
3
FN8168.4
August 30, 2006
PIN DESCRIPTIONS
Host Interface Pins
S
ERIAL
C
LOCK
(SCL)
The SCL input is used to clock data into and out of the
X9258.
S
ERIAL
D
ATA
(SDA)
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs. An open drain output requires
the use of a pull-up resistor. For selecting typical
values, refer to the guidelines for calculating typical
values on the bus pull-up resistors graph.
D
EVICE
A
DDRESS
(A
0
-
A
3
)
The Address inputs are used to set the least
significant 4 bits of the 8-bit slave address. A match in
the slave address serial data stream must be made
with
the
address
input
communication with the X9258. A maximum of 16
devices may occupy the 2-wire serial bus.
in
order
to
initiate
Potentiometer Pins
V
H
/R
H
(V
H0
/R
H0
- V
H3
/R
H3
), V
L
/R
L
(V
L0
/R
L0
-
V
L3
/R
L3
)
The V
H
/R
H
and V
L
/R
L
inputs are equivalent to the
terminal connections on either end of a mechanical
potentiometer.
V
W
/R
W
(V
W0
/R
W0
- V
W3
/R
W3
)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when low prevents nonvolatile writes to
the Data Registers.
Analog Supplies V+, V-
The Analog Supplies V+, V- are the supply voltages
for the DCP analog section.
PIN CONFIGURATION
PIN NAMES
PRINCIPLES OF OPERATION
The X9258 is a highly integrated microcircuit
incorporating four resistor arrays and their associated
registers and counters and the serial interface logic
providing direct communication between the host and
the DCP potentiometers.
Serial Interface—2-Wire
The X9258 supports a bidirectional bus oriented
protocol. The protocol defines any device that sends
data onto the bus as a transmitter and the receiving
device as the receiver. The device controlling the
transfer is a master and the device being controlled is
the slave. The master will always initiate data transfers
Symbol
Description
SCL
SDA
A0-A3
V
H0
/R
H0
- V
H3
/R
H3
,
V
L0
/R
L0
- V
L3
/R
L3
V
W0
/R
W0
- V
W3
/R
W3
Serial Clock
Serial Data
Device Address
Potentiometer Pins
(terminal equivalent)
Potentiometers Pins
(wiper equivalent)
Hardware Write Protection
Analog Supplies
System Supply Voltage
System Ground
No Connection (Allowed)
WP
V+,V-
V
CC
V
SS
NC
NC
A0
V
W3
/R
W3
V
H3
/R
H3
V
L3
/R
L3
V+
V
CC
V
L0
/R
L0
V
H0
/R
H0
V
W0
/R
W0
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
14
A3
SCL
V
L2
/R
L2
V
H2
/R
H2
V
W2
/R
W2
V–
V
SS
V
W1
/R
W1
V
H1
/R
H1
V
L1
/R
L1
A1
SOIC/TSSOP
X9258
13
11
12
A2
SDA
WP
X9258
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