參數(shù)資料
型號(hào)： x9255
元件分類(lèi)： 數(shù)字電位計(jì)
英文描述： Dual Two-wiper Digitally-Controlled (XDCP) Potentiometer(帶兩個(gè)滑動(dòng)端的雙路數(shù)控電位器(XDCP))
中文描述： 雙程雙線雨刮器數(shù)字控制（數(shù)字電位器）電位器（帶兩個(gè)滑動(dòng)端的雙路數(shù)控電位器（數(shù)字電位器））
文件頁(yè)數(shù)： 14/21頁(yè)
文件大?。?/td> 119K
代理商： X9255
X9455
14 of 21
REV 1.6 7/16/03
www.xicor.com
Slave Address Byte
Following a START condition, the master must output a
Slave Address Byte (Refer to figure 4.). This byte
includes three parts:
– The four MSBs (SA7-SA4) are the Device Type
Identifier, which must always be set to 0101 in order
to select the X9455.
– The next three bits (SA3-SA1) are the Device
Address bits (AS2-AS0). To access any part of the
X9455’s memory, the value of bits AS2, AS1, and
AS0 must correspond to the logic levels at pins A2,
A1, and A0 respectively.
– The LSB (SA0) is the R/W bit. This bit defines the
operation to be performed on the device being
addressed. When the R/W bit is “1”, then a Read
operation is selected. A “0” selects a Write operation
.
Figure 4. Slave Address (SA) Format
Nonvolatile Write Acknowledge Polling
After a nonvolatile write command sequence is
correctly issued (including the final STOP condition),
the X9455 initiates an internal high voltage write cycle.
This cycle typically requires 5 ms. During this time, any
Read or Write command is ignored by the X9455.
Write Acknowledge Polling is used to determine
whether a high voltage write cycle is completed.
During acknowledge polling, the master first issues a
START condition followed by a Slave Address Byte.
The Slave Address Byte contains the X9455’s Device
Type Identifier and Device Address. The LSB of the
Slave Address (R/W) can be set to either 1 or 0 in this
case. If the device is busy within the high voltage cycle,
then no ACK is returned. If the high voltage cycle is
completed, an ACK is returned and the master can
then proceed with a new Read or Write operation.
(Refer to figure 5.)
Figure 5. Acknowledge Polling Sequence
2-WIRE SERIAL INTERFACE OPERATION
X9455 Digital Potentiometer Register Organization
Refer to the Functional Diagram on page 1. There are
2 Digital Potentiometers, referred to as DCP0, and
DCP1. Each potentiometer has two volatile Wiper
Control Registers (WCRs). Each wiper has four non-
volatile registers to store wiper position or general
data. See Table 2 for register numbering.
SA6
SA7
SA5
SA3
SA2
SA1
SA0
Device Type
Identifier
Read or
Write
SA4
Slave Address
Bit(s)
SA7–SA4
SA3–SA1
SA0
Description
Device Type Identifier
Device Address
Read or Write Operation Select
R/W
0
1
0
1
Address
Device
AS0
AS1
AS2
ACK returned
Issue Slave Address
Byte (Read or Write)
Byte load completed by issuing
STOP. Enter ACK Polling
Issue STOP
Issue START
NO
YES
NO
Continue normal Read or Write
command sequence
PROCEED
YES
complete. Continue command
sequence.
High Voltage
Issue STOP
相關(guān)PDF資料
PDF描述
x9455 Dual Two-wiper Digitally-Controlled Potentiometer(帶兩個(gè)滑動(dòng)端的雙路數(shù)控電位器)
X9268 Dual Digitally-Controlled (XDCP) Potentiometers(低功耗,低噪聲,雙DCP,抽頭位置掉電自動(dòng)保存)
X9312(中文) Nonvolatile Digital Potentiometer(非易失性數(shù)字電位器)
X9313(中文) EEPOT Nonvolatile Digital Potentiometer(32個(gè)抽頭,-5V~+5V,非易失性數(shù)字電位器)
X9314(中文) EEPOT Nonvolatile Digital Potentiometer(32個(gè)抽頭,-5V~+5V,對(duì)數(shù)電阻特性,非易失性數(shù)字電位器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
X9258 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Noise/Low Power/2-Wire Bus/256 Taps
X9258)06 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Quad Digital Controlled Potentiometers
X9258_11 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Quad Digital Controlled Potentiometers(XDCP?)
X9258_13 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Noise/Low Power/2-Wire Bus/256 Taps
X9258TB24 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Quad Digital Controlled Potentiometers (XDCP)
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