參數(shù)資料
型號: x9255
元件分類: 數(shù)字電位計
英文描述: Dual Two-wiper Digitally-Controlled (XDCP) Potentiometer(帶兩個滑動端的雙路數(shù)控電位器(XDCP))
中文描述: 雙程雙線雨刮器數(shù)字控制(數(shù)字電位器)電位器(帶兩個滑動端的雙路數(shù)控電位器(數(shù)字電位器))
文件頁數(shù): 10/21頁
文件大?。?/td> 119K
代理商: X9255
X9455
10 of 21
REV 1.6 7/16/03
www.xicor.com
PRINCIPLES OF OPERATION
The X9455 is an integrated circuit incorporating two
resistor arrays with dual wipers on each array, their
associated registers and counters, and the serial inter-
face logic providing direct communication between the
host and the digitally controlled potentiometers. This
section provides detail description of the following:
– Resistor Array
– Up/Down Interface
– 2-wire Interface
Resistor Array Description
The X9455 is comprised of two resistor arrays. Each
array contains 255 discrete resistive segments that are
connected in series. The physical ends of each array
are equivalent to the fixed terminals of a mechanical
potentiometer (R
Hi
and R
Li
inputs). (See Figure 1.)
Each array has two independent wipers. At both ends
of each array and between each resistor segment are
two switches, one connected to each of the wiper pins
(R
WiA
and R
WiB
).
Within each individual array only one switch of each
wiper may be turned on at a time.
These switches are controlled by two Wiper Counter
Register (WCR). The 8-bits of the WCR are decoded to
select and enable one of 256 switches. Note that each
wiper has a dedicated WCR. When all bits of a WCR
are zeroes, the switch closest to the corresponding R
L
pin is selected. When all bits of a WCR are ones, the
switch closest to the corresponding R
H
pin is selected.
The WCRs are volatile and may be written directly.
There are four non-volatile Data Registers(DR) associ-
ated with each WCR. Each DR can be loaded into
WCR. All DRs and WCRs can be read or written.
Power Up and Down Requirements
During power up CS must be high to avoid inadvertant
“store” operations. At power up, the contents of Data
Registers Level 0 (DR0A0, DR0B0, DR1A0, and
DR1B0), are loaded into the corresponding wiper
counter register.
Figure 1. Detailed Block Diagram of one DCP
One of
256
Decoder
WCRiA[7:0]
= FF hex
R
Hi
R
WiA
R
Li
255
254
255
254
Volatile
8-bit
Wiper
Counter
Register
WCRiA
Four
Non-Volatile
Data
Registers
DRiA0, DRiA1,
DRiA2, and
DRiA3
“i” is either 0 or 1
WCRiB[7:0]
= 00 hex
1
0
R
WiB
0
1
WCRiB[7:0]
= FF hex
WCRiA[7:0]
= 00 hex
Volatile
8-bit
Wiper
Counter
Register
WCRiB
Four
Non-Volatile
Data
Registers
DRiB0, DRiB1,
DRiB2, and
DRiB3
2-wire and
Up/Down Interfaces
.
.
.
.
.
.
相關(guān)PDF資料
PDF描述
x9455 Dual Two-wiper Digitally-Controlled Potentiometer(帶兩個滑動端的雙路數(shù)控電位器)
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