參數(shù)資料
型號: X9250-2.7
廠商: Intersil Corporation
英文描述: Low Noise/Low Power/SPI Bus/256 Taps
中文描述: 低噪音/低功耗/水龍頭的SPI Bus/256
文件頁數(shù): 13/21頁
文件大?。?/td> 181K
代理商: X9250-2.7
X9250
Characteristics subject to change without notice.
13 of 21
REV 1.1.5 1/31/03
www.xicor.com
HIGH-VOLTAGE WRITE CYCLE TIMING
XDCP TIMING
SYMBOL TABLE
TIMING DIAGRAMS
Input Timing
Symbol
t
WR
Parameter
Typ.
5
Max.
10
Unit
ms
High-voltage write cycle time (store instructions)
Symbol
t
WRPO
t
WRL
t
WRID
Parameter
Min.
Max.
10
10
40
Unit
μs
μs
μs
Wiper response time after the third (last) power supply is stable
Wiper response time after instruction issued (all load instructions)
Wiper response time from an active SCL/SCK edge (increment/decrement instruc-
tion)
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
May change
from High to
Low
Will change
from Low to
High
Will change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
Changing:
State Not
Known
Center Line
is High
Impedance
...
CS
SCK
SI
SO
MSB
LSB
High Impedance
t
LEAD
t
H
t
SU
t
FI
t
CS
t
LAG
t
CYC
t
WL
...
t
RI
t
WH
相關PDF資料
PDF描述
X9250UV24I-2.7 Low Noise/Low Power/SPI Bus/256 Taps
X9250TS24 Low Noise/Low Power/SPI Bus/256 Taps
X9250TS24-2.7 Low Noise/Low Power/SPI Bus/256 Taps
X9250TS24I Low Noise/Low Power/SPI Bus/256 Taps
X9250TS24I-2.7 Low Noise/Low Power/SPI Bus/256 Taps
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