參數(shù)資料
型號: X9250-2.7
廠商: Intersil Corporation
英文描述: Low Noise/Low Power/SPI Bus/256 Taps
中文描述: 低噪音/低功耗/水龍頭的SPI Bus/256
文件頁數(shù): 12/21頁
文件大?。?/td> 181K
代理商: X9250-2.7
X9250
Characteristics subject to change without notice.
12 of 21
REV 1.1.5 1/31/03
www.xicor.com
AC TIMING
Symbol
f
SCK
t
CYC
t
WH
t
WL
t
LEAD
t
LAG
t
SU
t
H
t
RI
t
FI
t
DIS
t
V
t
HO
t
RO
t
FO
t
HOLD
t
HSU
t
HH
t
HZ
t
LZ
T
I
t
CS
t
WPASU
t
WPAH
Parameter
Min.
Max.
2.0
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
μs
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
SSI/SPI clock frequency
SSI/SPI clock cycle time
SSI/SPI clock high time
SSI/SPI clock low time
Lead time
Lag time
SI, SCK, HOLD and CS input setup time
SI, SCK, HOLD and CS input hold time
SI, SCK, HOLD and CS input rise time
SI, SCK, HOLD and CS input fall time
SO output disable Time
SO output valid time
SO output hold time
SO output rise time
SO output fall time
HOLD time
HOLD setup time
HOLD hold time
HOLD low to output in high Z
HOLD high to output in low Z
Noise suppression time constant at SI, SCK, HOLD and CS inputs
CS deselect time
WP, A0 and A1 setup time
WP, A0 and A1 hold time
500
200
200
250
250
50
75
2
2
0
500
100
0
50
50
400
100
100
100
100
TBD
2
0
0
Circuit #3 SPICE Macro Model
EQUIVALENT A.C. LOAD CIRCUIT
10pF
R
H
R
TOTAL
C
H
25pF
C
W
C
L
10pF
R
W
R
L
5V
1533
100pF
SDA Output
2.7V
100pF
相關(guān)PDF資料
PDF描述
X9250UV24I-2.7 Low Noise/Low Power/SPI Bus/256 Taps
X9250TS24 Low Noise/Low Power/SPI Bus/256 Taps
X9250TS24-2.7 Low Noise/Low Power/SPI Bus/256 Taps
X9250TS24I Low Noise/Low Power/SPI Bus/256 Taps
X9250TS24I-2.7 Low Noise/Low Power/SPI Bus/256 Taps
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