參數(shù)資料
型號(hào): X88C75 SLIC
英文描述: Port Expander and EE Memory(雙面,可同時(shí)讀寫,與通用8051系列直接接口,微控制器外圍芯片)
中文描述: 端口擴(kuò)展和EE內(nèi)存(雙面,可同時(shí)讀寫,與通用8051系列直接接口,微控制器外圍芯片)
文件頁(yè)數(shù): 5/28頁(yè)
文件大?。?/td> 240K
代理商: X88C75 SLIC
X88C75 SLIC
E
2
5
DATA PROTECTION
The X88C75 provides two levels of data protection
through software control. There is a global software data
protection feature similar to the industry standard for
E
2
PROMs and a new Block Lock Protect write lockout
protection providing a secondary level data security
option.
Software Data Protection
Software Data Protection (SDP) can be employed to
protect the entire array against inadvertent writes during
power-up/power-down operations. The X88C75 is
shipped from the factory with SDP enabled. With SDP
enabled, inadvertent attempts to write to the X88C75 will
be blocked.
The system can still write data, but only when the write
operation (page or byte) is preceded by the three-byte
command sequence. All write operations, both the com-
mand sequence and any data write operations must
conform to the page write timing requirements.
The SDP mode is also enabled anytime one of the
nonvolatile configuration registers are modified. These
include writing to EE map, SFR map, and BPR.
Block Lock Protect Write Lockout
The X88C75 provides a second level of data security
referred to as Block Lock Protect write lockout (or Block
Protect). This is accessed through an extension of the
SDP command sequence. Block Protect allows the user
to lockout writes to 1K x 8 blocks of memory. Unlike SDP
which prevents inadvertent writes, but still allows easy
system access to writing the memory, Block Protect will
lockout all attempts unless it is specifically disabled by
issuing the deactivation sequence. This feature can be
used to set a higher level of protection in a system where
a portion of the memory is used to store the system
kernel and protect it from the application programs
residing in the other blocks.
Setting write lockout is accomplished by writing a five-
byte command sequence opening access to the Block
Protect Register (BPR). After the fifth byte is written, the
user writes to the BPR, selecting which blocks to protect
or unprotect. All write operations, both the command
sequence and writing the data to the BPR, must conform
to the page write timing requirements. It should be noted
Figure 2. Writing With SDP Enabled
AA
b2
P 555
b1 b0
55
b2
AAA
b1 b0
A0
b2
P 555
b1 b0
2887 ILL F06
Perform Byte or
Page Write Operations
Reference the A15–A13
setting in EEM register
P = Address bit (A12) of the
updated memory plane
Delay of t
WC
Exit Routine
b2 b1 b0
P
Figure 3. Sequence to Deactivate Software Data
Protection
AA
b2
P 555
b1 b0
55
b2
AAA
AAA
b1 b0
A0
b2
P 555
b1 b0
AA
b2
P 555
b1 b0
80
b2
P
2887 ILL F07
b1 b0
Reference the A15–A13
setting in EEM register
P = Address bit (A12) of the
memory plane not being read.
Delay of t
WC
Exit Routine
b2 b1 b0
P
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