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參數(shù)資料
| 型號(hào)： | X4C105 |
| 廠商： | Intersil Corporation |
| 元件分類： | CPU監(jiān)測 |
| 英文描述： | RTC Module With CPU Supervisor |
| 中文描述： | 時(shí)鐘模塊CPU監(jiān)控 |
| 文件頁數(shù)： | 4/19頁 |
| 文件大?。?/td> | 296K |
| 代理商： | X4C105 |
4
FN8124.0
March 18, 2005
Serial Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL
is HIGH. The device continuously monitors the SDA
and SCL lines for the start condition and will not
respond to any command until this condition has been
met. See Figure 3.
Serial Stop Condition
All communications must be terminated by a stop con-
dition, which is a LOW to HIGH transition of SDA when
SCL is HIGH. The stop condition is also used to place
the device into the standby power mode after a read
sequence. A stop condition can only be issued after the
transmitting device has released the bus. See Figure 2.
Serial Acknowledge
Acknowledge is a software convention used to indicate
successful data transfer. The transmitting device, either
master or slave, will release the bus after transmitting
eight bits. During the ninth clock cycle, the receiver will
pull the SDA line LOW to acknowledge that it received
the eight bits of data. Refer to Figure 4.
The device will respond with an acknowledge after
recognition of a start condition and if the correct device
identifier and select bits are contained in the slave
address byte. If a write operation is selected, the
device will respond with an acknowledge after the
receipt of each subsequent eight bit word. The device
will acknowledge all incoming data and address bytes,
except for the slave address byte when the device
identifier and/or select bits are incorrect or when the
device is busy, such as during a nonvolatile write.
In the read mode, the device will transmit eight bits of
data, release the SDA line, then monitor the line for an
acknowledge. If an acknowledge is detected and no
stop condition is generated by the master, the device
will continue to transmit data. The device will terminate
further data transmissions if an acknowledge is not
detected. The master must then issue a stop condition
to return the device to standby mode and place the
device into a known state.
Figure 3. Valid Start and Stop Conditions
Figure 4. Acknowledge Response From Receiver
SCL
SDA
Start
Stop
SCL from
Master
Data Output
from
Data Output
from Receiver
8
1
9
Start
Acknowledge
X4C105
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| X4C105V20-3AT1 | 功能描述:IC SUPERVISOR NOVRAM/EE 20-TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時(shí):最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X4C105V20-3C7889 | 制造商:Intersil Corporation 功能描述: |
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