參數(shù)資料
型號(hào): X40030
廠商: Intersil Corporation
英文描述: Thyristor Diode Module; Repetitive Reverse Voltage Max, Vrrm:100V; Current Rating:325A
中文描述: 三電壓監(jiān)視器集成CPU監(jiān)控
文件頁(yè)數(shù): 12/21頁(yè)
文件大?。?/td> 322K
代理商: X40030
12
FN8114.0
April 28, 2005
SERIAL DEVICE ADDRESSING
Slave Address Byte
Following a start condition, the master must output a
Slave Address Byte. This byte consists of several parts:
– a device type identifier that is always ‘1011’.
– one bit (AS) that provides the device select bit. AS
bit is set-to “0” as factory default.
– next bit is ‘0’.
Figure 12. X40030, X40031, X40034, X40035
Addressing
– last bit of the slave command byte is a R/W bit. The
R/W bit of the Slave Address Byte defines the oper-
ation to be performed. When the R/W bit is a one,
then a read operation is selected. A zero selects a
write operation.
Word Address
The word address is either supplied by the master or
obtained from an internal counter. The internal counter
is undefined on a power up condition.
Operational Notes
The device powers-up in the following state:
– The device is in the low power standby state.
– The WEL bit is set to ‘0’. In this state it is not possi-
ble to write to the device.
– SDA pin is the input mode.
– RESET/RESET Signal is active for
t
PURST
.
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
– The WEL bit must be set to allow write operations.
– The proper clock count and bit sequence is required
prior to the stop bit in order to start a nonvolatile
write cycle.
– A three step sequence is required before writing into
the Control Register to change Watchdog Timer or
Block Lock settings.
– The WP pin, when held HIGH, prevents all writes to
the array and all the Register.
Control Register
1
0
1
1
0
0
1
R/W
Slave Byte
1
0
1
1
0
0
0
R/W
Fault Detection Register
Control Register
1
1
1
1
1
1
1
1
Word Address
1
1
1
1
1
1
1
1
Fault Detection Register
X40030, X40031, X40034, X40035
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