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參數(shù)資料
| 型號(hào)： | X2N5457 |
| 英文描述： | TRANSISTOR | JFET | N-CHANNEL | 5MA I(DSS) | CHIP |
| 中文描述： | 晶體管|場(chǎng)效應(yīng)| N溝道| 5mA的我（直）|芯片 |
| 文件頁(yè)數(shù)： | 1/1頁(yè) |
| 文件大小： | 16K |
| 代理商： | X2N5457 |
N-Channel JFET
General Purpose Ampifier/Swtch
2N5457 – 2N5459
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25
o
C unless otherwise noted)
Drain-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Drain-Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Continuous Forward Gate Current . . . . . . . . . . . . . . . . 10mA
Storage Temperature Range . . . . . . . . . . . . . -65
o
C to +150
o
C
Operating Temperature Range . . . . . . . . . . . -55
o
C to +135
o
C
Lead Temperature (Soldering, 10sec). . . . . . . . . . . . . +300
o
C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310mW
Derate above 25
o
C . . . . . . . . . . . . . . . . . . . . . . 2.82mW/
o
C
NOTE:
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part
2N5457-59
X2N5457-59 Sorted Chips in Carriers
Package
Plastic TO-92
Temperature Range
-55
o
C to +135
o
C
-55
o
C to +135
o
C
C ORPORATION
PIN CONFIGURATION
TO-92
SG
D
ELECTRICAL CHARACTERISTICS
(T
A
= 25
o
C unless otherwise specified)
SYMBOL
BV
GSS
PARAMETER
MIN
-25
MAX
UNITS
V
TEST CONDITIONS
Gate-Source Breakdown Voltage
I
G
= -10
μ
A, V
DS
= 0
V
GS
= -15V, V
DS
= 0
V
GS
= -15V, V
DS
= 0, T
A
= 100
o
C
V
DS
= 15V, I
D
= 10nA
I
GSS
Gate Reverse Current
-1.0
-200
-6.0
-7.0
-8.0
nA
V
GS(off)
Gate-Source Cutoff Voltage
2N5457
2N5458
2N5459
2N5457
2N5458
2N5459
2N5457
2N5458
2N5459
2N5457
2N5458
2N5459
-0.5
-1.0
-2.0
2.5
3.5
4.5
1.0
2.0
4.0
1000
1500
2000
V
V
GS
Gate-Source Voltage
V
V
DS
= 15V, I
D
= 100
μ
A, Typical
V
DS
= 15V, I
D
= 200
μ
A, Typical
V
DS
= 15V, I
D
= 400
μ
A, Typical
V
DS
= 15V, V
GS
= 0
I
DSS
Zero-Gate-Voltage Drain Current
(Note 1)
5.0
9.0
16
5000
5500
6000
50
7.0
3.0
3.0
mA
| y
fs
|
Forward Transfer Admittance
μ
S
V
DS
= 15V, V
GS
= 0 , f = 1kHz
| y
os
|
C
iss
C
rss
NF
Output Admittance
Input Capacitance (Note 2)
Reverse Transfer Capacitance (Note 2)
Noise Figure (Note 2)
μ
S
pF
pF
dB
V
DS
= 15V, V
GS
= 0, f = 1kHz
V
DS
= 15V, V
GS
= 0, f = 1MHz
V
DS
= 15V, V
GS
= 0, f = 1MHz
V
DS
= 15V, V
GS
= 0, R
G
= 1MHz, BW = 1Hz, f = 1kHz
NOTES: 1.
Pulse test required. PW
≤
630ms, duty cycle
≤
10%.
2.
For design reference only, not 100% tested.
5010
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