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參數(shù)資料
| 型號： | X28HC256 |
| 英文描述： | 5 Volt, Byte Alterable EEPROM(5V，字節(jié)可改變的EEPROM) |
| 中文描述： | 5伏，可變字節(jié)的EEPROM（5V的，字節(jié)可改變的EEPROM中） |
| 文件頁數(shù)： | 7/25頁 |
| 文件大?。?/td> | 212K |
| 代理商： | X28HC256 |
X28HC256
7
SOFTWARE DATA PROTECTION
Figure 6. Timing Sequence—Byte or Page Write
CE
WE
(VCC)
WRITE
PROTECTED
VCC
0V
DATA
ADDRESS
AA
5555
55
2AAA
A0
5555
WRITES
OK
BYTE
OR
PAGE
tWC
≤
tBLC MAX
3859 FHD F16
Figure 7. Write Sequence for
Software Data Protection
Regardless of whether the device has previously been
protected or not, once the software data protection
algorithm is used and data has been written, the
X28HC256 will automatically disable further writes un-
less another command is issued to cancel it. If no further
commands are issued the X28HC256 will be write
protected during power-down and after any subsequent
power-up.
Note: Once initiated, the sequence of write operations
should not be interrupted.
WRITE LAST
BYTE TO
LAST ADDRESS
WRITE DATA 55
TO ADDRESS
2AAA
WRITE DATA A0
TO ADDRESS
5555
WRITE DATA XX
TO ANY
ADDRESS
AFTER tWC
RE-ENTERS DATA
PROTECTED STATE
WRITE DATA AA
TO ADDRESS
5555
BYTE/PAGE
LOAD ENABLED
OPTIONAL
BYTE OR
PAGE WRITE
ALLOWED
3859 FHD F06
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X28HT512 | High Temperature, 5 Volt, Byte Alterable EEPROM(工作溫度可達(dá)170℃，5V，字節(jié)可改變的EEPROM) |
| X2N4117 | TRANSISTOR | JFET | N-CHANNEL | 20UA I(DSS) | CHIP |
| SST4117A | 1-Mb (128K x 8) Static RAM |
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| SST4119A | IC, SRAM, CY7C199-10VC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X28HC256_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:5V, Byte Alterable EEPROM |
| X28HC256D-12 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:5V, Byte Alterable EEPROM |
| X28HC256D-15 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:5 Volt, Byte Alterable EEPROM |
| X28HC256D1-90 | 制造商:Intersil Corporation 功能描述: |
| X28HC256D-70 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:5 Volt, Byte Alterable EEPROM |
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