- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372532 > X25640 Advanced SPI Serial E2PROM With Block LockTM Protection PDF資料下載
參數(shù)資料
| 型號： | X25640 |
| 英文描述： | Advanced SPI Serial E2PROM With Block LockTM Protection |
| 中文描述： | 先進的SPI串行E2PROM保護帶座LockTM |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 64K |
| 代理商： | X25640 |
X25640
2
PIN DESCRIPTIONS
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked out
by the falling edge of the serial clock.
Serial Input (SI)
SI is the serial data input pin. All opcodes, byte
addresses, and data to be written to the memory are
input on this pin. Data is latched by the rising edge of the
serial clock.
Serial Clock (SCK)
The Serial Clock controls the serial bus timing for data
input and output. Opcodes, addresses, or data present
on the SI pin are latched on the rising edge of the clock
input, while data on the SO pin change after the falling
edge of the clock input.
Chip Select (
CS
)
When
CS
is HIGH, the X25640 is deselected and the SO
output pin is at high impedance and unless an internal
write operation is underway, the X25640 will be in the
standby power mode.
CS
LOW enables the X25640,
placing it in the active power mode. It should be noted
that after power-up, a HIGH to LOW transition on
CS
is
required prior to the start of any operation.
Write Protect (
WP
)
When
WP
is LOW and the nonvolatile bit WPEN is high,
nonvolatile writes to the X25640 status register are
disabled, but the part otherwise functions normally.
When
WP
is held HIGH, all functions, including nonvola-
tile writes operate normally.
WP
going LOW while
CS
is
still LOW will interrupt a write to the X25640 status
register. If the internal write cycle has already been
initiated,
WP
going LOW will have no affect on a write.
The
WP
pin function is blocked when the WPEN bit in
the status register is LOW. This allows the user to install
the X25640 in a system with
WP
pin grounded and still
be able to write to the status register. The
WP
pin
functions will be enabled when the WPEN bit is set “1”.
Hold (
HOLD
)
HOLD
is used in conjunction with the
CS
pin to select the
device. Once the part is selected and a serial sequence is
underway,
HOLD
may be used to pause the serial com-
munication with the controller without resetting the serial
sequence. To pause,
HOLD
must be brought LOW while
PIN CONFIGURATION
PIN NAMES
Symbol
CS
SO
SI
SCK
WP
V
SS
V
CC
HOLD
NC
Description
Chip Select Input
Serial Output
Serial Input
Serial Clock Input
Write Protect Input
Ground
Supply Voltage
Hold Input
No Connect
3089 PGM T01
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
NC
NC
CS
SO
WP
VSS
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
NC
VCC
HOLD
SCK
SI
NC
X25640
X25640
3089 ILL F02.3
8-LEAD DIP
14-LEAD SOIC
SCK s LOW. To resume communication,
HOLD
s brought
HIGH, again while SCK is LOW. If the pause feature is not
used,
HOLD
should be held HIGH at all times.
相關PDF資料 |
PDF描述 |
|---|---|
| X25650P | IC-64K CMOS EEPRM M |
| X25650S14I | SPI Serial EEPROM |
| X25650S-2.5 | SPI Serial EEPROM |
| X25650S | SPI Serial EEPROM |
| X25650S14 | SPI Serial EEPROM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| X25640S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:IC-SM-64K SERIAL EEPROM+SPI |
| X25642 | 制造商:ICMICR 功能描述: |
| X25642F | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced SPI Serial E2PROM with Block Lock Protection |
| X25642FG | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced SPI Serial E2PROM with Block Lock Protection |
| X25642FP | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced SPI Serial E2PROM with Block Lock Protection |
發(fā)布緊急采購，3分鐘左右您將得到回復。