參數(shù)資料
型號: X24C01AS8M-3
英文描述: Serial E2PROM
中文描述: 串行E2PROM
文件頁數(shù): 10/13頁
文件大?。?/td> 58K
代理商: X24C01AS8M-3
X24C01A
10
WRITE CYCLE LIMITS
Symbol
Parameter
Min.
Typ.
(5)
Max.
Units
t
WR(6)
Write Cycle Time
5
10
ms
3841 PGM T10
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
erase/program cycle. During the write cycle, the X24C01A
bus interface circuits are disabled, SDA is allowed to
remain high, and the device does not respond to its slave
address.
Write Cycle Timing
SDA
8th BIT
WORD n
ACK
tWR
STOP
CONDITION
START
CONDITION
X24C01A
ADDRESS
SCL
3841 FHD F04
Guidelines for Calculating Typical Values of Bus
Pull-Up Resistors
SYMBOL TABLE
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
OUTPUTS
INPUTS
WAVEFORM
3841 FHD F16
120
100
80
40
60
20
20
40
60
80 100 120
0
0
R
)
BUS CAPACITANCE (pF)
MIN.
RESISTANCE
MAX.
RESISTANCE
RMAX =CBUS
tR
RMIN =
IOL MIN
VCC MAX=1.8K
Notes:
(5) Typical values are for T
A
= 25
°
C and nominal supply voltage (5V).
(6) t
WR
is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
device requires to perform the internal write operation.
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