Preliminary Information
1
DESCRIPTION
The X24C01A is a CMOS 1024 bit serial E
2
PROM,
internally organized 128 x 8. The X24C01A features a
serial interface and software protocol allowing operation
on a simple two wire bus. Three address inputs allow up
to eight devices to share a common two wire bus.
Xicor E
2
PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years. Available in an eight
pin DIP and SOIC package.
FEATURES
2.7V to 5.5V Power Supply
Low Power CMOS
—Active Current Less Than 1 mA
—Standby Current Less Than 50
μ
A
Internally Organized 128 x 8
Self Timed Write Cycle
—Typical Write Cycle Time of 5 ms
2 Wire Serial Interface
—Bidirectional Data Transfer Protocol
Four Byte Page Write Operation
—Minimizes Total Write Time Per Byte
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
New Hardwire – Write Control Function
Xicor, 1991 Patents Pending
Characteristics subject to change without notice
1K
X24C01A
128 x 8 Bit
Serial E
2
PROM
FUNCTIONAL DIAGRAM
3841 FHD F01
START
STOP
LOGIC
CONTROL
LOGIC
SLAVE ADDRESS
REGISTER
+COMPARATOR
H.V. GENERATION
TIMING
& CONTROL
WORD
ADDRESS
COUNTER
XDEC
YDEC
DOUT
ACK
E
2
PROM
32x32
DATA REGISTER
START CYCLE
(8) VCC
(4) VSS
(7) WC
R/W
PIN
(5) SDA
(6) SCL
(3) A2
(2) A1
(1) A0
DOUT
LOAD
INC
CK
8
3841-1