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參數(shù)資料
| 型號(hào)： | X1288S16T1 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/27頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC/CAL/CPU SUP EE 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 時(shí)鐘/日歷 |
| 特點(diǎn)： | 警報(bào)器，閏年，監(jiān)控器，監(jiān)視計(jì)時(shí)器 |
| 時(shí)間格式： | HH:MM:SS:hh（12/24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
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15
FN8102.3
April 14, 2006
LOW VOLTAGE RESET OPERATION
When a power failure occurs, and the voltage to the
part drops below a fixed vTRIP voltage, a reset pulse is
issued to the host microcontroller. The circuitry moni-
tors the VCC line with a voltage comparator which
senses a preset threshold voltage. Power-up and
power-down waveforms are shown in Figure 5. The
Low Voltage Reset circuit is to be designed so the
RESET signal is valid down to 1.0V.
When the low voltage reset signal is active, the opera-
tion of any in progress nonvolatile write cycle is unaf-
fected, allowing a nonvolatile write to continue as long
as possible (down to the power-on reset voltage). The
low voltage reset signal, when active, terminates in
progress communications to the device and prevents
new commands, to reduce the likelihood of data cor-
ruption.
VCC THRESHOLD RESET PROCEDURE [Optional]
The X1288 is shipped with a standard VCC threshold
(VTRIP) voltage. This value will not change over normal
operating and storage conditions. However, in applica-
tions where the standard VTRIP is not exactly right, or if
higher precision is needed in the VTRIP value, the
X1288 threshold may be adjusted. The procedure is
described below, and uses the application of a nonvol-
atile write control signal.
Setting the VTRIP Voltage
It is necessary to reset the trip point before setting the
new value.
To set the new VTRIP voltage, apply the desired VTRIP
threshold voltage to the VCC pin and tie the RESET pin
to the programming voltage VP. Then write data 00h to
address 01h. The stop bit following a valid write opera-
tion initiates the VTRIP programming sequence. Bring
RESET to VCC to complete the operation. Note: this
operation may take up to 10 milliseconds to complete
and also writes 00h to address 01h of the EEPROM
array.
Resetting the VTRIP Voltage
This procedure is used to set the VTRIP to a “native”
voltage level. For example, if the current VTRIP is 4.4V
and the new VTRIP must be 4.0V, then the VTRIP must
be reset. When VTRIP is reset, the new VTRIP is some-
thing less than 1.7V. This procedure must be used to
set the voltage to a lower value.
To reset the new VTRIP voltage, apply more than 5.5V
to the VCC pin and tie the RESET pin to the
programming voltage VP. Then write 00h to address
03h. The stop bit of a valid write operation initiates the
VTRIP programming sequence. Bring RESET to VCC to
complete the operation. Note: this operation takes up
to 10 milliseconds to complete and also writes 00h to
address 03h of the EEPROM array.
For best accuracy in setting VTRIP, it is advised that
the following sequence be used.
1.Program VTRIP as above.
2.Measure resulting VTRIP by measuring the VCC
value where a RESET occurs. Calculate Delta =
(Desired – Measured) VTRIP value.
3.Perform a VTRIP program using the following formula
to set the voltage of the RESET pin:
VRESET = (Desired Value – Delta) + 0.025V
tRSP<tWDO
tRST
RESET
SDA
tRSP
Note: All inputs are ignored during the active reset period (tRST).
tRST
SCL
tRSP>tWDO
Start
Stop
Start
FIGURE 4. WATCHDOG RESTART/TIME OUT
X1288
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