FN8101.1 April 14, 2006 PIN ASSIGNMENTS Pin Number Symbol Brief Description EIAJ SOIC TSSOP 11 X1 X1. The X1 pin is the input of an inverting am" />
參數(shù)資料
型號: X1286V14I
廠商: Intersil
文件頁數(shù): 19/25頁
文件大?。?/td> 0K
描述: IC RTC/CAL/CPU SUP EE 14-TSSOP
標準包裝: 95
類型: 時鐘/日歷
特點: 警報器,閏年,監(jiān)控器,監(jiān)視計時器
時間格式: HH:MM:SS:hh(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.7 V ~ 5.5 V
電壓 - 電源,電池: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
3
FN8101.1
April 14, 2006
PIN ASSIGNMENTS
Pin Number
Symbol
Brief Description
EIAJ SOIC
TSSOP
11
X1
X1. The X1 pin is the input of an inverting amplifier. An external 32.768kHz quartz
crystal is used with the X1286 to supply a timebase for the real time clock. The
recommended crystal is a Citizen CFS206-32.768KDZF. Internal compensation
circuitry is included to form a complete oscillator circuit. Care should be taken in the
placement of the crystal and the layout of the circuit. Plenty of ground plane around
the device and short traces to X1 are highly recommended. See Application section
for more recommendations.
22
X2
X2. The X2 pin is the output of an inverting amplifier. An external 32.768kHz
quartz crystal is used with the X1286 to supply a timebase for the real time clock.
The recommended crystal is a Citizen CFS206-32.768KDZF. Internal compensation
circuitry is included to form a complete oscillator circuit. Care should be taken in the
placement of the crystal and the layout of the circuit. Plenty of ground plane around
the device and short traces to X2 are highly recommended. See Application section
for more recommendations.
36
PHZ/IRQ
Programmable Frequency/Interrupt Output – PHZ/IRQ. This is either an
output from the internal oscillator or an interrupt signal output. It is a CMOS
output.
When used as frequency output, this signal has a frequency of 32.768kHz,
100Hz, 1Hz or inactive.
When used as interrupt output, this signal notifies a host processor that an alarm
has occurred and an action is required. It is an active LOW output.
The control bits for this function are FO1 and FO0 and are found in address
0011h of the Clock Control Memory map. See “Programmable Frequency Output
47
VSS
VSS.
58
SDA
Serial Data (SDA). SDA is a bidirectional pin used to transfer data into and out
of the device. It has an open drain output and may be wire ORed with other open
drain or open collector outputs. The input buffer is always active (not gated).
An open drain output requires the use of a pull-up resistor. The output circuitry
controls the fall time of the output signal with the use of a slope controlled pull-
down. The circuit is designed for 400kHz 2-wire interface speed.
69
SCL
Serial Clock (SCL). The SCL input is used to clock all data into and out of the
device. The input buffer on this pin is always active (not gated).
713
VBACK
VBACK. This input provides a backup supply voltage to the device. VBACK
supplies power to the device in the event the VCC supply fails. This pin can be
connected to a battery, a Supercap or tied to ground if not used.
814
VCC
VCC.
X1286
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