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參數(shù)資料
| 型號： | WV3HG264M72EEU806D7SG |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 128M X 72 DDR DRAM MODULE, DMA244 |
| 封裝： | ROHS COMPLIANT, MINI, DIMM-244 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 221K |
| 代理商： | WV3HG264M72EEU806D7SG |
WV3HG264M72EEU-D7
May 2006
Rev. 0
ADVANCED
6
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
DDR2 ICC SPECIFICATIONS AND CONDITIONS
Includes DDR2 SDRAM components only; VCC = +1.8V±0.1V
Symbol
Parameter
Condition
806
665
534
403
Unit
ICC0*
Operating
one bank
active-
precharge;
tCK = tCK(I
CC); tRC = tRC(ICC); tRAS = tRAS MIN(ICC); CKE is HIGH, CS# is HIGH between valid
commands; Address bus inputs are SWITCHING; Data bus inputs are SWITCHING
TBD
1,337
1,292
mA
ICC1*
Operating
one bank
active-
read-
precharge;
IOUT = 0mA; BL = 4; CL = CL(ICC); tCK = tCK(I
CC); tRC = tRC(ICC); tRAS = tRAS MIN(ICC); CKE is
HIGH, CS# is HIGH between valid commands; Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING; Data pattern is same as ICC4W.
TBD
1,272
1,227
mA
ICC2P**
Precharge
power-
down
current;
All banks idle; tCK = tCK(I
CC); CKE is LOW; Other control and address bus inputs are
STABLE; Data bus inputs are FLOATING
TBD
444
mA
ICC2Q**
Precharge
quite
standby
current;
All banks idle; tCK = tCK(I
CC); CKE is HIGH; CS# is HIGH; Other control and address bus
inputs are STABLE; Data bus inputs are FLOATING
TBD
930
840
mA
ICC2N**
Precharge
standby
current;
All banks idle; tCK = tCK(I
CC); CKE is HIGH; CS# is HIGH; Other control and address bus
inputs are STABLE; Data bus inputs are SWITCHING
TBD
1,020
930
mA
ICC3P**
Active
power-
down
current;
All banks open; tCK = tCK(I
CC), CKE is LOW; Other control
and address bus inputs are STABLE; Data bus inputs are
FLOATING
Fast PDN Exit
MRS(12) = 0
TBD
840
mA
Slow PDN Exit
MRS(12) = 1
TBD
516
mA
ICC3N**
Active
standby
current;
All banks open; tCK = tCK(I
CC); tRC = tRC(ICC); tRAS = tRAS MIN(ICC); CKE is HIGH, CS#
is HIGH between valid commands; Other control and address bus inputs are
SWITCHING; Data bus inputs are SWITCHING
TBD
1,290
1,200
mA
ICC4W*
Operating
burst write
current;
All banks open; Continuous burst writes; BL = 4; CL = CL(ICC); AL = 0; tCK = tCK(I
CC);
tRC = tRC(I
CC); tRAS = tRAS MIN(ICC); CKE is HIGH, CS# is HIGH between valid commands;
Address bus inputs are SWITCHING; Data bus inputs are SWITCHING
TBD
1,632
1,452
1,362
mA
ICC4R*
Operating
burst read
current;
All banks open; Continuous burst reads; TOUT = 0mA; BL = 4; CL = CL(ICC); AL = 0;
tCK = tCK(I
CC); tRC = tRC(ICC); tRAS = tRAS MIN(ICC); CKE is HIGH, CS# is HIGH between
valid commands; Address bus inputs are SWITCHING; Data pattern is same as ICC4W.
TBD
1,677
1,497
1,362
mA
ICC5**
Burst auto
refresh
current;
tCK = tCK(I
CC); Refresh command at every tRC(ICC) interval; CKE is HIGH; CS# is HIGH
between valid commands; Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
TBD
3,000
2,820
mA
ICC6**
Self
refresh
current;
CK and CK# at 0V; CKE < 0.2V; Other control and address bus
inputs are FLOATING; Data bus inputs are FLOATING
Normal
TBD
144
mA
ICC7*
Operating
bank
interleave
read
current;
All bank interleaving reads; IOUT = 0mA; BL = 4; CL = CL(ICC); AL = tRCD(I
CC) - 1*tCK(ICC);
tCK = tCK(I
CC); tRC = tRC(ICC); tRRD = tRRD MIN(ICC) = 1*tCK(ICC); CKE is HIGH; CS# is HIGH
between valid commands; Address bus inputs are STABLE during DESELECTs; Data
bus inputs are SWITCHING
TBD
2,352
mA
Notes:
ICC specication is based on SAMSUNG components. Other DRAM manufacturers specication may be different.
* Value calculated as one module rank in this operating condition, and all other module ranks in ICC2P ( CKE LOW) mode.
** Value calculated reects all module ranks in this operating condition.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WV3HG264M72EEU806PD4IMG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM UDIMM, SO-DIMM w/PLL |
| WV3HG264M72EEU806PD4ISG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM UDIMM, SO-DIMM w/PLL |
| WV3HG264M72EEU806PD4MG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM UDIMM, SO-DIMM w/PLL |
| WV3HG264M72EEU806PD4SG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM UDIMM, SO-DIMM w/PLL |
| WV3HG264M72EEU-D6 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM UNBUFFERED |
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