- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄361933 > WS512K32-XXX 512Kx32 SRAM Module(低功耗CMOS，128Kx32靜態(tài)RAM模塊（存取時(shí)間15，17，20，25，35，45，55ns）) PDF資料下載
參數(shù)資料
| 型號(hào)： | WS512K32-XXX |
| 英文描述： | 512Kx32 SRAM Module(低功耗CMOS，128Kx32靜態(tài)RAM模塊（存取時(shí)間15，17，20，25，35，45，55ns）) |
| 中文描述： | 512Kx32 SRAM的模塊（低功耗的CMOS，128Kx32靜態(tài)內(nèi)存模塊（存取時(shí)間15,17,20,25,35,45,55納秒）） |
| 文件頁(yè)數(shù)： | 4/9頁(yè) |
| 文件大小： | 188K |
| 代理商： | WS512K32-XXX |
4
White Electronic Designs Corporation Phoenix, AZ (602) 437-1520
WS512K32-XXX /
EDI8C32512CA
AC CHARACTERISTICS
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55
°
C to +125
°
C)
FIG. 4
AC TEST CIRCUIT
NOTES:
V
Z
is programmable from-2V to +7V.
I
OL
& I
OH
programmable from0 to 16mA.
Tester Impedance Z
0
= 75
.
V
Z
is typically the mdpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
I
Current Source
D.U.T.
C = 50 pf
I
OL
V
≈
1.5V
(Bipolar Supply)
Z
Current Source
OH
AC CHARACTERISTICS
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55
°
C to +125
°
C)
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
Unit
V
ns
V
V
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Parameter
Symbol
-15*
-17
-20
-25
-35
-45
-55
Units
Write Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min Max
Write Cycle Time
t
WC
15
17
20
25
35
45
55
ns
Chip Select to End of Write
t
CW
13
15
15
17
25
35
50
ns
Address Valid to End of Write
t
AW
13
15
15
17
25
35
50
ns
Data Valid to End of Write
t
DW
10
11
12
13
20
25
25
ns
Write Pulse Width
t
WP
13
15
15
17
25
35
40
ns
Address Setup Time
t
AS
2
2
2
2
2
2
2
ns
Address Hold Time
t
AH
0
0
0
0
0
5
5
ns
Output Active from End of Write
t
OW
1
2
2
3
4
4
5
5
ns
Write Enable to Output in High Z
t
WHZ
1
8
9
11
13
15
20
20
ns
Data Hold Time
t
DH
0
0
0
0
0
0
0
ns
* 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice.
1. This parameter is guaranteed by design but not tested.
2. The Address Setup Time of minimum 2ns is for the G2T and H1 packages. t
AS
minimum for the G4T package is 0ns.
Parameter
Symbol
-15*
-17
-20
-25
-35
-45
-55
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
t
RC
15
17
20
25
35
45
55
ns
Address Access Time
t
AA
15
17
20
25
35
45
55
ns
Output Hold from Address Change
t
OH
0
0
0
0
0
0
0
ns
Chip Select Access Time
t
ACS
15
17
20
25
35
45
55
ns
Output Enable to Output Valid
t
OE
8
9
10
12
25
25
25
ns
Chip Select to Output in Low Z
t
CLZ
1
2
2
2
2
4
4
4
ns
Output Enable to Output in Low Z
t
OLZ
1
0
0
0
0
0
0
0
ns
Chip Disable to Output in High Z
t
CHZ
1
12
12
12
12
15
20
20
ns
Output Disable to Output in High Z
t
OHZ
1
12
12
12
12
15
20
20
ns
* 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice.
1. This parameter is guaranteed by design but not tested.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WS512K32BV-15E | 512Kx32 3.3V SRAM Module(512Kx32, 3.3V,靜態(tài)RAM模塊（BiCOMS,存取時(shí)間15ns）) |
| WS512K32BV-17E | 512Kx32 3.3V SRAM Module(512Kx32, 3.3V,靜態(tài)RAM模塊（BiCOMS,存取時(shí)間17ns）) |
| WS512K32BV-20E | 512Kx32 3.3V SRAM Module(512Kx32, 3.3V,靜態(tài)RAM模塊（BiCOMS,存取時(shí)間20ns）) |
| WS512K32NBV-17H2 | GIGATRUE 550 CAT PATCH CABLE NO BOOT 15FT GREEN |
| WS512K32NBV-17H2CE | GIGATRUE 550 CAT PATCH CBL NO BOOT 15FT GR 25 PK |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WS512K48-XG4WX | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:SRAM MCP |
| WS512K8-100CC | 制造商:White Electronic Designs 功能描述:512K X 8 SRAM MODULE, 5V, 100NS, 32 DIP, COMMERCIAL SCREENED - Bulk |
| WS512K8-100CI | 制造商:White Electronic Designs 功能描述:512K X 8 SRAM MODULE, 5V, 100NS, 32 DIP, INDUSTRIAL SCREENED - Bulk |
| WS512K8-100CIE | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x8 SRAM Module |
| WS512K8-100CM | 制造商:White Electronic Designs 功能描述:512K X 8 SRAM MODULE, 5V, 100NS, 32 DIP, MIL-SCREENED - Bulk |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。