參數(shù)資料
型號(hào)： WM8192
廠商： Wolfson Microelectronics
英文描述： TVS UNIDIRECT 400W 6.5V SMA
中文描述： （8）位輸出16位獨(dú)聯(lián)體/防治荒漠化公約AFE的/數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 4/24頁
文件大?。?/td> 619K
代理商： WM8192
WM8192
ELECTRICAL CHARACTERISTICS
Product Preview
WOLFSON MICROELECTRONICS LTD
PP Rev 1.0 June 2000
4
Test Conditions
AVDD = DVDD1 = DVDD2 = 4.75 to 5.25V, AGND = DGND = 0V, T
A
= 0 to 70
°
C, MCLK = 12MHz unless otherwise stated.
PARAMETER
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
UNIT
Overall System Specification (including 16-bit ADC, PGA, Offset and CDS functions)
Full-scale input voltage range
(see Note 1)
Input signal limits (see Note 2)
V
IN
Full-scale transition error
Max Gain
Min Gain
0.4
4.08
Vp-p
Vp-p
V
mV
0
AVDD
Gain = 0dB;
PGA[7:0] = 4B(hex)
Gain = 0dB;
PGA[7:0] = 4B(hex)
20
Zero-scale transition error
20
mV
Differential non-linearity
Integral non-linearity
Channel to channel gain matching
References
Upper reference voltage
Lower reference voltage
Input return bias voltage
Diff. reference voltage (VRT-VRB)
Output resistance VRT, VRB, VRX
VRLC/Reset-Level Clamp (RLC)
RLC switching impedance
VRLC short-circuit current
VRLC output resistance
VRLC Hi-Z leakage current
RLCDAC resolution
RLCDAC step size, RLCDAC = 0
RLCDAC step size, RLCDAC = 1
RLCDAC output voltage at
code 0(hex), RLCDACRNG = 0
RLCDAC output voltage at
code 0(hex), RLCDACRNG = 1
RLCDAC output voltage at
code F(hex) RLCDACRNG, = 0
RLCDAC output voltage at
code F(hex), RLCDACRNG = 1
VRLC deviation
Offset DAC, Monotonicity Guaranteed
Resolution
Differential non-linearity
Integral non-linearity
Step size
Output voltage
DNL
INL
TBD
TBD
1
LSB
LSB
%
VRT
VRB
VRX
V
RTB
2.85
1.35
0.65
1.5
1
V
V
V
V
50
5
2
mA
μ
A
bits
V/step
V/step
V
VRLC = 0 to AVDD
1
4
V
RLCSTEP
V
RLCSTEP
V
RLCBOT
0.24
0.16
0.40
V
RLCBOT
0.25
V
V
RLCTOP
4.20
V
V
RLCTOP
2.85
V
-50
+50
mV
8
bits
LSB
LSB
mV/step
mV
mV
DNL
INL
0.1
0.25
2.04
-260
+260
0.5
1
Code 00(hex)
Code FF(hex)
Notes:
1.
2.
Full-scale input voltage
denotes the maximum amplitude of the input signal at the specified gain.
Input signal limits
are the limits within which the full-scale input voltage signal must lie.
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