參數(shù)資料
型號(hào): WM8150
廠商: Wolfson Microelectronics
英文描述: DIODE TVS 400W 5V UNI DIR
中文描述: 單通道12位獨(dú)聯(lián)體/防治荒漠化公約與4位寬輸出模擬前端
文件頁數(shù): 2/24頁
文件大?。?/td> 271K
代理商: WM8150
WM8150
Production Data
w
PD Rev 3.0 November 2002
2
PIN CONFIGURATION
ORDERING INFORMATION
DEVICE
TEMP. RANGE
PACKAGE
WM8150CDS
0 to 70
o
C
20-pin SSOP
WM8150CDS/R
0 to 70
o
C
20-pin SSOP
(tape and reel)
WM8150
1
VINP
2
3
4
5
6
7
8
10
9
20
19
18
17
16
15
14
13
11
12
DVDD1
VSMP
MCLK
DGND
SEN
DVDD2
SDI
SCK
OP[0]
AGND2
VRLC/VBIAS
VRX
VRT
VRB
AGND1
AVDD
OP[3]/SDO
OP[1]
OP[2]
Note:
Reel quantity = 2,000
PIN DESCRIPTION
PIN
1
2
3
4
NAME
AGND2
DVDD1
VSMP
MCLK
TYPE
Supply
Supply
Digital input
Digital input
DESCRIPTION
Analogue ground (0V).
Digital core (logic and clock generator) supply (5V)
Video sample synchronisation pulse.
Master clock. This clock is applied at N times the input pixel rate (N = 2, 3, 6, 8 or
any multiple of 2 thereafter depending on input sample mode).
Digital ground (0V).
Enables the serial interface when high.
Digital supply (5V/3.3V), all digital I/O pins.
Serial data input.
Serial clock.
Digital multiplexed output data bus.
ADC output data (d11:d0) is available in 4-bit multiplexed format as shown below.
A
B
d8
d4
d9
d5
d10
d6
d11
d7
Alternatively, pin OP[3]/SDO may be used to output register read-back data when
address bit 4=1 and SEN has been pulsed high. See Serial Interface description in
Device Description section for further details.
Analogue supply (5V)
Analogue ground (0V).
Lower reference voltage.
This pin must be connected to AGND via a decoupling capacitor.
Upper reference voltage.
This pin must be connected to AGND via a decoupling capacitor.
Input return bias voltage.
This pin must be connected to AGND via a decoupling capacitor.
Selectable analogue output voltage for RLC or single-ended bias reference.
This pin would typically be connected to AGND via a decoupling capacitor.
VRLC can be externally driven if programmed Hi-Z.
Video input.
5
6
7
8
9
DGND
SEN
DVDD2
SDI
SCK
Supply
Digital input
Supply
Digital input
Digital input
C
d0
d1
d2
d3
D
10
11
12
13
OP[0]
OP[1]
OP[2]
OP[3]/SDO
Digital output
Digital output
Digital output
Digital output
OVRNG
CC0
CC1
0
14
15
16
AVDD
AGND1
VRB
Supply
Supply
Analogue output
17
VRT
Analogue output
18
VRX
Analogue output
19
VRLC/VBIAS
Analogue I/O
20
VINP
Analogue input
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