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參數(shù)資料
| 型號： | WM2633IDT |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | 9V BLK BOX (4.876X6.876X2.0) |
| 中文描述： | 字節(jié)寬并行輸入，12位電壓輸出DAC，帶有內(nèi)部參考 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大小： | 389K |
| 代理商： | WM2633IDT |
Production Data
WM2633
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 July 1999
5
Test Characteristics
:
R
L
= 10k
, C
L
= 100pF AVDD = DVDD = 5V
±
10%, V
REF
= 2.048V and AVDD = DVDD = 3V
±
10%, V
REF
= 1.024V over
recommended operating free-air temperature range (unless noted otherwise).
PARAMETER
SYMBOL
TEST
CONDITIONS
Code 2047 to code 2048
MIN
TYP
MAX
UNIT
Glitch energy
5
nV-s
Signal to noise ratio
SNR
f
S
= 480ksps,
f
OUT
= 1kHz BW = 20kHz,
TA=25
°
C See Note 12
f
S
= 480ksps,
f
OUT
= 1kHz BW = 20kHz,
TA=25
°
C See Note 12
f
S
= 480ksps,
f
OUT
= 1kHz BW = 20kHz,
TA=25
°
C See Note 12
f
S
= 480ksps,
f
OUT
= 1kHz BW = 20kHz, T
A
=
25
°
C See Note 12
73
78
dB
Signal to noise and distortion ratio
SNRD
61
67
dB
Total harmonic distortion
THD
-69
-62
dB
Spurious free dynamic range
SPFDR
63
74
dB
Reference Configured as Input
Reference input resistance
RREF
10
M
Reference input capacitance
CREF
55
pF
Reference feedthrough
V
REF
=1V
PP
at 1kHz
+ 1.024V d.c., DAC code 0
V
REF
= 0.2V
PP
+ 1.024V d.c.
DAC code 2048
Slow
Fast
-60
dB
Reference input bandwidth
500
900
kHz
kHz
Reference Configured as Output
Low reference voltage
V
REFOUTL
1.003
1.024
1.045
V
High reference voltage
V
REFOUTH
VDD > 4.75V
2.027
2.048
2.069
V
Output source current
I
REFSRC
1
mA
Output sink current
I
REFSNK
-1
mA
Load Capacitance
100
pF
PSRR
-48
dB
Digital Inputs
High level input current
I
IH
Input voltage = DVDD
1
μ
A
Low level input current
I
IL
Input voltage = 0V
-1
μ
A
Input capacitance
C
I
8
pF
Notes
:
1.
Integral non-linearity (INL)
is the maximum deviation of the output from the line between zero and full scale excluding
the effects of zero code and full scale errors).
2.
Differential non-linearity (DNL)
is the difference between the measured and ideal 1LSB amplitude change
of any adjacent two codes. A guarantee of monotonicity means the output voltage changes in the same
direction (or remains constant) as a change in digital input code.
3.
Zero code error
is the voltage output when the DAC input code is zero.
4.
Gain error
is the deviation from the ideal full scale output excluding the effects of zero code error.
5.
Power supply rejection ratio
is measured by varying AVDD from 4.5V to 5.5V and measuring the
proportion of this signal imposed on the zero code error and the gain error.
6.
Zero code error
and
Gain error
temperature coefficients are normalised to full scale voltage.
7.
Output load regulation
is the difference between the output voltage at full scale with a 10k
load and 2k
load. It is expressed as a percentage of the full scale output voltage with a 10k
load.
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